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SN74LVCH16T245-EP Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LVCH16T245-EP Datasheet(HTML) 2 Page - Texas Instruments |
2 / 14 page GQL OR ZQL PACKAGE (TOP VIEW) J H G F E D C B A 2 1 3 4 6 5 K SN74LVCH16T245-EP SCES726 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com The SN74LVCH16T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then all outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION(1) TA PACKAGE(2) ORDERABLE PART NUMBER Top-Side Marking TSSOP – DGG Tape and reel CLVCH16T245MDGGREP 8UT245MEP –55°C to 125°C TVSOP – DGV Tape and reel CLVCH16T245MDGVREP LDHT245MEP (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVCH16T245-EP |
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