FM33256B SPI Companion w/ FRAM

This product conforms to specifications per the terms of the Ramtron

Ramtron International Corporation

standard warranty. The product has completed Ramtron’s internal

1850 Ramtron Drive, Colorado Springs, CO 80921

qualification testing and has reached production status.

(800) 545-FRAM, (719) 481-7000

www.ramtron.com

Rev. 3.0

Aug. 2012

Page 2 of 28

Pin Configuration

Pin Name

Function

/CS

Chip Select

SCK

Serial Clock

SI

Serial Data Input

SO

Serial Data Output

PFI

Power Fail Input

PFO

Power Fail Output (NMI)

CNT

Event Counter Input

ACS

Alarm/Calibration/SqWave

/RST

Reset Input/Output

X1, X2

External

Crystal

Connections

(optional)

VDD

Supply Voltage

VBAK

Battery-Backup Supply

VSS

Ground

Pin Descriptions

Pin Name

Type

Pin Description

/CS

Input

Chip Select: This active low input activates the device. When high, the device enters low-

power standby mode, ignores the SCK and SI inputs, and the SO output is tri-stated.

When low, the device internally activates the SCK signal. A falling edge on /CS must

occur prior to every op-code.

SCK

Input

Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on the

rising edge and outputs occur on the falling edge. Since the device is static, the clock

frequency may be any value between 0 and 16 MHz and may be interrupted at any time.

SI

Input

Serial Input: All data is input to the device on this pin. The pin is sampled on the rising

edge of SCK and is ignored at other times. It should always be driven to a valid logic level

interface.

SO

Output

Serial Output: This is the data output pin. It is driven during a read and remains tri-stated

at all other times. Data transitions are driven on the falling edge of the serial clock. The

SO pin may be connected to SI for a single pin data interface.

CNT

Input

Event Counter Input: This input increments the counter when an edge is detected on this

pin. The polarity is programmable and the counter value is nonvolatile or battery-backed,

depending on the mode. This pin should be tied to ground if unused.

ACS

Output

Alarm/Calibration/SquareWave: This is an open-drain output that requires an external

pullup resistor. In normal operation, this pin acts as the active-low alarm output. In

Calibration mode, a 512 Hz square-wave is driven out. In SquareWave mode, the user

may select a frequency of 1, 512, 4096, or 32768 Hz to be used as a continuous output.

The SquareWave mode is entered by clearing the AL/SW and CAL bits in register 18h.

X1, X2

I/O

32.768 kHz crystal connection (see Crystal Type section for suggestions). See AN407

app. note for details on how to connect external oscillator.

/RST

I/O

Reset: This active-low output is open drain with weak pull-up. It is also an input when

used as a manual reset. This pin should be left floating if unused.

PFI

Input

Early Power-fail Input: Typically connected to an unregulated power supply to detect an

early power failure. This pin must be tied to ground if unused.

PFO

Output

Early Power-fail Output: This pin is the early power-fail output and is typically used to

drive a microcontroller NMI pin. PFO drives low when the PFI voltage is <1.5V.

VBAK

Supply

Backup supply voltage: A 3V battery or a large value capacitor. If no backup supply is

is UL recognized and ensures no excessive current when using a lithium battery.

VDD

Supply

Supply Voltage.

VSS

Supply

Ground

VDD

PFI

ACS

SCK

PFO

SI

RST

VSS

X1

VBAK

CNT

1

2

3

4

5

6

7

14

13

12

11

10

9

8

X2

SO

CS