Low

Noise

Clock

Generator

XO

CDCM9102

XIN

RESET

OS0

OS1

OE

OSCOUT

OUT1P

OUT1N

OUT0P

OUT0N

Vreg

Vreg

REGCAP1

REGCAP2

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

9

10

11

12

13

14

15

16

1

2

3

4

5

6

7

8

CDCM9102

VDD3

OS1

RESET

NC

GND

VDD4

NC

NC

NC

NC

NC

NC

NC

NC

GND

(thermal pad)

NC

OS0

CDCM9102

SCAS922

– FEBRUARY 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Figure 2. CDCM9102 Block Diagram

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TOP VIEW

Figure 3. Pin Diagram

2

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© 2012, Texas Instruments Incorporated

Product Folder Link(s): CDCM9102