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TM4SP64KPN Datasheet(PDF) 2 Page - Texas Instruments |
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TM4SP64KPN Datasheet(HTML) 2 Page - Texas Instruments |
2 / 15 page TM4SP64KPN 4194304 BY 64BIT TM8SP64KPN 8388608 BY 64BIT SYNCHRONOUS DYNAMIC RAM MODULES SMMS708 − APRIL 1998 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 DUAL-IN-LINE MEMORY MODULE ( TOP VIEW ) TM8SP64KPN ( SIDE VIEW ) 1 10 11 40 84 41 PIN NOMENCLATURE A[0:11] Row-Address Inputs A[0:7] Column-Address Inputs A13/BA0 Bank-Select Zero A12/BA1 Bank-Select One CAS Column-Address Strobe CKE[0:1] Clock Enable CK[0:3] System Clock DQ[0:63] Data-In / Data-Out DQMB[0:7] Data-In/Data-Out Mask Enable NC No Connect RAS Row-Address Strobe S[0:3] Chip-Select SA[0:2] Serial Presence Detect (SPD) Device Address Input SCL SPD Clock SDA SPD Address / Data VDD 3.3-V Supply VSS Ground WE Write Enable TM4SP64KPN ( SIDE VIEW ) |
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