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TMS427809AP Datasheet(PDF) 7 Page - Texas Instruments |
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TMS427809AP Datasheet(HTML) 7 Page - Texas Instruments |
7 / 29 page TMS417809A, TMS427809A, TMS427809AP 2097152 BY 8-BIT EXTENDED DATA OUT DYNAMIC RANDOM-ACCESS MEMORIES SMKS894B – AUGUST 1996 – REVISED NOVEMBER 1997 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 electrical characteristics over recommended ranges of supply voltage and ambient conditions (unless otherwise noted) (continued) TMS427809A / P PARAMETER TEST CONDITIONS† ’427809A / P - 50 ’427809A / P -60 ’427809A / P - 70 UNIT PARAMETER TEST CONDITIONS† MIN MAX MIN MAX MIN MAX UNIT VOH High-level output IOH = – 2 mA LVTTL 2.4 2.4 2.4 V VOH output voltage IOH = – 100 µA LVCMOS VCC – 0.2 VCC – 0.2 VCC – 0.2 V VOL Low-level output IOL = 2 mA LVTTL 0.4 0.4 0.4 V VOL output voltage IOL = 100 µA LVCMOS 0.2 0.2 0.2 V II Input current (leakage) VCC = 3.6 V, VI = 0 V to 3.9 V, All others = 0 V to VCC ± 10 ± 10 ± 10 µA IO Output current (leakage) VCC = 3.6 V, VO = 0 V to VCC, CAS high ± 10 ± 10 ± 10 µA ICC1‡§ Average read- or write-cycle current VCC = 3.6 V, Minimum cycle 120 100 90 mA VIH = 2 V (LVTTL) After one memory cycle ’427809A 2 2 2 mA Average After one memory cycle, RAS and CAS high ’427809AP 1 1 1 mA ICC2 g standby current VIH = VCC – 0.2 V (LVCMOS), ’427809A 1 1 1 mA (), After one memory cycle, RAS and CAS high ’427809AP 150 150 150 µA ICC3‡§ Average refresh current (RAS-only refresh or CBR) VCC = 3.6 V, Minimum cycle, RAS cycling, CAS high (RAS-only refresh), RAS low after CAS low (CBR) 120 100 90 mA ICC4‡¶ Average EDO current VCC = 3.6 V, tHPC = MIN, RAS low, CAS cycling 110 90 80 mA ICC6# Average self-refresh current CAS < 0.2 V, RAS < 0.2 V, Measured after tRASS min 200 200 200 µA ICC10# Battery back-up operating current (equivalent refresh time is 128 ms), CBR only tRC = 62.5 µs, tRAS ≤ 300 ns VCC – 0.2 V ≤ VIH ≤ 3.9 V, 0 V ≤ VIL ≤ 0.2 V, W and OE = VIH, Address and data stable 350 350 350 µA † For conditions shown as MIN / MAX, use the appropriate value specified in the timing requirements. ‡ Measured with outputs open § Measured with a maximum of one address change while RAS = VIL ¶ Measured with a maximum of one address change during each EDO cycle, tHPC # For TMS427809AP only |
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