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74HC4060-Q100 Datasheet(PDF) 4 Page - NXP Semiconductors |
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74HC4060-Q100 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 24 page 74HC_HCT4060_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 2 August 2012 4 of 24 NXP Semiconductors 74HC4060-Q100; 74HCT4060-Q100 14-stage binary ripple counter with oscillator 6. Pinning information 6.1 Pinning 6.2 Pin description (1) The die substrate is attached to this pad using conductive die attach material. It cannot be used as supply pin or input. Fig 5. Pin configuration SO16 and TSSOP16 Fig 6. Pin configuration DHVQFN16 +&4 +&74 4 9&& 4 4 4 4 4 4 4 05 4 56 4 57& *1' &7& DDD DDD +&4 +&74 4 57& 4 56 4 05 4 4 4 4 4 4 7UDQVSDUHQWWRSYLHZ WHUPLQDO LQGH[DUHD 9&& Table 2. Pin description Symbol Pin Description Q11 to Q13 1, 2, 3 counter output Q3 to Q9 7, 5, 4, 6, 14, 13, 15 counter output GND 8 ground (0 V) CTC 9 external capacitor connection RTC 10 external resistor connection RS 11 clock input /oscillator pin MR 12 master reset input (active HIGH) VCC 16 supply voltage |
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Similar Description - 74HC4060-Q100 |
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