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CAUC1G125MDCKREP Datasheet(PDF) 1 Page - Texas Instruments |
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CAUC1G125MDCKREP Datasheet(HTML) 1 Page - Texas Instruments |
1 / 9 page www.ti.com FEATURES V CC 3 2 4 5 1 OE Y A GND Seemechanicaldrawingsfordimensions. DCKPACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN74AUC1G125-EP SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCES670 – MARCH 2007 • Controlled Baseline • I off Supports Partial-Power-Down Mode Operation – One Assembly Site • Sub-1-V Operable – One Test Site • Max t pd of 2.5 ns at 1.8 V – One Fabrication Site • Low Power Consumption, 10-µA Max I CC • Extended Temperature Performance of –55°C to 125 °C • ±8-mA Output Drive at 1.8 V • Enhanced Diminishing Manufacturing Sources • Latch-Up Performance Exceeds 100 mA Per (DMS) Support JESD 78, Class II • Enhanced Product-Change Notification • ESD Protection Exceeds JESD 22 • Qualification Pedigree (1) – 2000-V Human-Body Model (A114-A) • Optimized for 1.8-V Operation and Is 3.6-V I/O – 200-V Machine Model (A115-A) Tolerant to Support Mixed-Mode Signal – 1000-V Charged-Device Model (C101) Operation (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. The SN74AUC1G125 is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC1G125 is a single-line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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