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TLC320AD55 Datasheet(PDF) 11 Page - Texas Instruments |
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TLC320AD55 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 41 page  1–5 1.5 Terminal Functions (Continued) TERMINALS I/O DESCRIPTION NAME NO. I/O DESCRIPTION VA(SUB) 22 I Analog substrate. VA(SUB) must be grounded. VD(SUB) 19 I Digital substrate. VD(SUB) must be grounded. VDD(ADC) 24 I Analog ADC path supply VDD(DAC) 5 I Analog DAC path supply VSS(ADC) 21 I Analog ADC path ground VSS(DAC) 7 I Analog DAC path ground NOTE 1: All digital inputs and outputs are TTL compatible unless otherwise noted. 1.6 Definitions and Terminology Data Transfer Interval The time during which data is transferred from DOUT and to DIN. The interval is 16 shift clocks and this data transfer is initiated by the falling edge of the frame-sync signal. Signal Data The input signal and all of the converted representations through the ADC channel and return through the DAC channel to the analog output. This is contrasted with the purely digital software control data. Primary Communications The digital data transfer interval. Since the device is synchronous, the signal data words from the ADC channel and to the DAC channel occur simultaneously. Secondary Communications The digital control and configuration data transfer interval into DIN and the register read data cycle from DOUT. The data transfer interval occurs when requested by hardware or software. Frame Sync The falling edge of the signal that initiates the data transfer interval. The primary frame sync starts the primary communications, and the secondary frame sync starts the secondary communications. Frame Sync and Sampling Period The time between falling edges of successive primary frame-sync signals. fs The sampling frequency that is the reciprocal of the sampling period. Frame-Sync Interval The time period occupied by 16 shift clocks. It goes high on the sixteenth rising edge of SCLK after the falling edge of the frame sync. ADC Channel All signal processing circuits between the analog input and the digital conversion results at DOUT. DAC Channel All signal processing circuits between the digital data word applied to DIN and the differential output analog signal available at OUTP and OUTM. Host Any processing system that interfaces to DIN, DOUT, SCLK, or FS. Dxx A bit position in the primary data word (xx is the bit number). DSxx A bit position in the secondary data word (xx is the bit number). d The alpha character d is used to represent valid programmed or default data in the control register format (see secondary serial communications) when discussing other data bit portions of the register. X The alpha character X represents a don’t-care bit position within the control register format. FIR Finite-duration impulse response. |
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