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TM124BBK32H-60 Datasheet(PDF) 7 Page - Texas Instruments |
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TM124BBK32H-60 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 9 page TM124BBK32H, TM124BBK32I 1048576 BY 32-BIT TM248CBK32H, TM248CBK32I 2097152 BY 32-BIT DYNAMIC RAM MODULES SMMS679 – MARCH 1997 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timing requirements over recommended ranges of supply voltage and operating free-air temperature ’124BBK32H / I - 50 ’248CBK32H / I - 50 ’124BBK32H / I - 60 ’248CBK32H / I - 60 ’124BBK32H / I - 70 ’248CBK32H / I - 70 UNIT MIN MAX MIN MAX MIN MAX tWCH Hold time, W low after CAS low 10 10 15 ns tCHR Delay time, RAS low to CAS high (CBR refresh only) 10 10 10 ns tCRP Delay time, CAS high to RAS low 5 5 5 ns tCSH Delay time, RAS low to CAS high 50 60 70 ns tCSR Delay time, CAS low to RAS low (CBR refresh only) 5 5 5 ns tRAD Delay time, RAS low to column address (see Note 10) 13 25 15 30 15 35 ns tRAL Delay time, column address to RAS high 25 30 35 ns tCAL Delay time, column address to CAS high 25 30 35 ns tRCD Delay time, RAS low to CAS low (see Note 10) 18 37 20 45 20 52 ns tRPC Delay time, RAS high to CAS low (CBR only) 5 5 5 ns tRSH Delay time, CAS low to RAS high 13 15 18 ns tREF Refresh time interval 16 16 16 ms tT Transition time 2 30 2 30 2 30 ns NOTE 10: The maximum value is specified only to ensure access time. device symbolization (TM124BBK32H/I illustrated) TM124BBK32H -SS YYMMT YY = Year Code MM = Month Code T = Assembly Site Code -SS = Speed Code NOTE A: Location of symbolization may vary. |
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