TM497FBK32H, TM497FBK32I 4194304 BY 32BIT

TM893GBK32H, TM893GBK32I 8388608 BY 32BIT

EXTENDEDDATAOUT DYNAMIC RAM MODULES

SMMS674A − MARCH 1997 − REVISED SEPTEMBER 1997

8

POST OFFICE BOX 1443

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature (see Note 7)

PARAMETER

’497FBK32H / I-50

’893GBK32H / I-50

’497FBK32H / I-60

’893GBK32H / I-60

’497FBK32H / I-70

’893GBK32H / I-70

UNIT

PARAMETER

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

tAA

Access time from column address

25

30

35

ns

tCAC

Access time from CAS low

13

15

18

ns

tCPA

Access time from column precharge

28

35

40

ns

tRAC

Access time from RAS low

50

60

70

ns

tCLZ

CAS to output in low-impedance state

0

0

0

ns

tREZ

Output buffer turn off delay from RAS (see Note 6)

3

13

3

15

3

18

ns

tCEZ

Output buffer turn off delay from CAS (see Note 6)

3

13

3

15

3

18

ns

tWEZ

Output buffer turn off delay from W (see Note 6)

3

13

3

15

3

18

ns

NOTES:

6. The maximum values of tREZ, tCEZ, and tWEZ are specified when the output is no longer driven. Data in should not be driven until

one of the applicable maximum specifications is satisfied.

7. All cycles assume tT = 2 ns.

EDO timing requirements over recommended ranges of supply voltage and operating free-air

temperature (see Note 7)

’497FBK32H / I-50

’893GBK32H / I-50

’497FBK32H / I-60

’893GBK32H / I-60

’497FBK32H / I-70

’893GBK32H / I-70

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

tHPC

Cycle time, EDO page mode read or write

20

25

30

ns

tPRWC

Cycle time, EDO read-write

57

68

78

ns

tCSH

Hold time, CAS after RAS

40

48

58

ns

tDOH

Hold time, output after RAS

5

5

5

ns

tCAS

Pulse duration, CAS

8

10 000

10

10 000

12

10 000

ns

tWPE

Pulse duration, W (output disable only)

7

7

7

ns

tCP

Precharge time, CAS

8

10

10

ns

NOTE 7. All cycles assume tT = 2 ns.