SC9301

5

Electrical Characteristics (continued)

Parameter

Conditions

Min

Typ

Max

Units

Fault Protection

VDD = 5V, R

ILIM

= 7320, T

J

= 0 to +125 °C

8.5

10

11.5

A

VDD = 3.3V, R

ILIM

= 7320, T

J

= 0 to +125 °C

9

A

I

LIM

Source Current

Trimmed to match lower FET Rdson

9

μA

I

LIM

Comparator Offset

With respect to AGND

-8

0

+8

mV

Output Under-Voltage Threshold

V

FB

with respect to internal 600mV reference,

8 consecutive cycles

-25

%

V

FB

with respect to internal 600mV reference

+10

%

Over-Voltage Protection Threshold

V

FB

with respect to internal 600mV reference

+20

%

5μs

10°C hysteresis

150

°C

Logic Inputs/Outputs

Logic Input High Voltage

EN, ENL

1.0

V

Logic Input Low Voltage

EN, ENL

0.4

V

EN Input Bias Current

EN = VDD or AGND

-10

+10

μA

ENL Input Bias Current

ENL = V

IN

= 28V

-1

11

+18

μA

FB Input Bias Current

FB = VDD or AGND

-1

+1

μA

Linear Regulator (LDO)

VLDO Accuracy

VLDO load = 10mA

4.90

5.0

5.10

V

Current Limit

Short-circuit protection, V

IN

= 12V, VLDO < 1V

20

mA

V

IN

= 12V, 1V < VLDO < 4.5V

115

Operating, VLDO > 4.5V

200

V

IN

to VLDO, VLDO load = 100mA

1.9

V

Notes:

(1)

VIN UVLO is programmable using a resistor divider from VIN to ENL to AGND. The ENL voltage is compared to an internal reference.

(2)

Typical value measured on standard evaluation board.

(3)

The device has first order temperature compensation for over current. Results vary based upon the PCB thermal layout.

(4)

The LDO drop out voltage is the voltage at which the LDO output drops 2% below the nominal regulation point.