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SN65LVDS180MPWREP Datasheet(PDF) 9 Page - Texas Instruments |
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SN65LVDS180MPWREP Datasheet(HTML) 9 Page - Texas Instruments |
9 / 22 page www.ti.com VOC Z Y Input CL = 10 pF (2 Places) 3 V 0 V VOC(PP) VOC(SS) VOC 49.9 Ω, ±1% (2 Places) Driver Enable 1.2 V Z Y 0.8 V or 2 V 49.9 Ω, ±1% (2 Places) CL = 10 pF (2 Places) DE VOY VOZ 2 V 0.8 V tdis ten tdis ten 1.4 V ~1.4 V 1.2 V 1.25 V 1.2 V ~1 V 1.15 V DE VOY or VOZ VOZ or VOY D at 2 V and input to DE D at 0.8 V and input to DE SN65LVDS179-EP ,, SN65LVDS180-EP SN65LVDS050-EP, SN65LVDS051-EP HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS SGLS203B – SEPTEMBER 2003 – REVISED JANUARY 2007 PARAMETER MEASUREMENT INFORMATION (continued) A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns. C L includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T. The measurement of VOC(PP) is made on test equipment with a –3-dB bandwidth of at least 300 MHz. Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. C L includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T. Figure 4. Enable and Disable Time Circuit and Definitions 9 Submit Documentation Feedback |
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