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AN10897 Datasheet(PDF) 2 Page - NXP Semiconductors |
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AN10897 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 30 page  AN10897_2 © NXP B.V. 2010. All rights reserved. Application note Rev. 02 — 19 January 2010 2 of 30 Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors AN10897 A guide to designing for ESD and EMC Revision history Rev Date Description 02 20100119 application note; second release Modifications: • Title of application note modified: appended “and EMC” • Section 2.3.5 “Filters”, 1st bullet item, 2nd sub-bullet: changed from “high filter capacitors” to “high speed capacitors” • Section 2.3.6 “Ground”, 2nd equation following 3rd paragraph changed from “V = 20 × 10e−9 × (10A/10e−9)” to “V = 20 nH × (10A/10ns)” • Section 3.1 “Board structure - functional grouping”: 3rd paragraph re-written. • Section 3.1.1.1 “4-layer board stack-up”, 2nd sentence: changed from “use a wide core” to “use a thick core”. • Figure 18 “Recommended stack-ups” modified (adjusted height of stack-up layers) • Section 3.1.2 “Ground planes”: – deleted 3rd and 4th bullet items following the 3rd paragraph. – 4th paragraph (immediately follows Figure 23) was re-written (now 4th, 5th and 6th paragraphs). • Figure 26 “Ground island and vias” modified (added label “vias to ground” on left side). • Figure 31 “Ground plane boundary” modified (added “20 × layer spacing” measurement) 01 20091214 application note; initial version |
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