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MC74LVX4245DTG Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74LVX4245DTG Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 10 page © Semiconductor Components Industries, LLC, 2011 May, 2011 − Rev. 5 1 Publication Order Number: MC74LVX4245/D MC74LVX4245 Dual Supply Octal Translating Transceiver with 3−State Outputs The 74LVX4245 is a 24−pin dual−supply, octal translating transceiver that is designed to interface between a 5.0 V bus and a 3.0 V bus in a mixed 3.0 V / 5.0 V supply environment such as laptop computers using a 3.3 V CPU and 5.0 V LCD display. The A port interfaces with the 5V bus; the B port interfaces with the 3.0 V bus. The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active−High) enables data from the A port to the B port. Receive (active−Low) enables data from the B port to the A port. The Output Enable (OE) input, when High, disables both A and B ports by placing them in 3−State. Features • Bi−directional Interface Between 5.0 V and 3.0 V Buses • Control Inputs Compatible with TTL Level • 5.0 V Data Flow at A Port and 3.0 V Data Flow at B Port • Outputs Source/Sink 24 mA at 5.0 V Bus and 12 mA at 3.0 V Bus • Guaranteed Simultaneous Switching Noise Level and Dynamic Threshold Performance • Available in SOIC and TSSOP Packages • Functionally Compatible with the 74 Series 245 • These Devices are Pb−Free and are RoHS Compliant Figure 1. 24−Lead Pinout (Top View) 23 24 22 21 20 19 18 2 1 3456 7 VCCB 17 8 16 9 15 10 VCCB OE B0 B1 B2 B3 B4 B5 B6 VCCA T/R A0 A1 A2 A3 A4 A5 A6 A7 14 11 13 12 B7 GND GND GND http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION PIN NAMES Function Output Enable Input Transmit/Receive Input Side A 3−State Inputs or 3−State Outputs Side B 3−State Inputs or 3−State Outputs Pins OE T/R A0−A7 B0−B7 MARKING DIAGRAMS SOIC−24 DW SUFFIX CASE 751E 1 24 LVX 4245G ALYW LVX4245 AWLYYWWG 1 24 1 24 1 24 TSSOP−24 DT SUFFIX CASE 948H LVX4245 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) |
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