NCP1336BDR2G datasheet(6/26 Pages) ONSEMI

Part #	NCP1336BDR2G

Description	Quasi-Resonant Current Mode Controller for High Power Universal Off-Line Supplies

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Manufacturer	ONSEMI [ON Semiconductor]

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NCP1336A/B

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ELECTRICAL CHARACTERISTICS

(For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V unless otherwise noted)

Symbol

Rating

Min

Typ

Max

Unit

SUPPLY SECTION

VCCon

VCC increasing level at which the current source turns−off

14

15

16

V

VCCmin

VCC level below which output pulses are stopped

8

9

10

V

VCCreset

Internal latch reset level

−

5.5

−

V

ICC1

Internal IC consumption, no output load on DRV pin (Fsw = 10 kHz)

−

1.4

2.0

mA

ICC1light

ICC1 for a Feedback Voltage Equal to VHVCO (internal bias reduction), with CT =

220 pF (corresponding to an Fsw of about 20 kHz)

1.8

mA

ICC2

Internal IC consumption, 1 nF output load on pin 9, Fsw = 65 kHz

−

2.5

3.0

mA

ICC3

Internal IC consumption, hiccup phase (VCCmin < VCC < VCCon)

−

0.45

0.6

mA

INTERNAL STARTUP CURRENT SOURCE (TJ > 05C) (HV Pin Biased to 60 Vdc)

IC2

High−voltage current source, VCC = 10 V (Note 3)

3

6

9

mA

IC1

High−voltage current source, VCC = 0

150

300

550

mA

VTh

VCC transition level for IC1 to IC2 toggling point (IHV = 2.5 mA)

0.3

0.7

0.9

V

Ileak

Leakage current for the high voltage source, VHV(pin) = 500 Vdc

1

12

30

mA

DRIVE OUTPUT

Tr

Output voltage rise−time @ CL = 1 nF, 10%−90% of a 12 V output signal

−

40

75

ns

Tf

Output voltage fall−time @ CL = 1 nF, 10%−90% of a 12 V output signal

−

25

60

ns

Isource

Source current capability at VDRV = 2 V

−

500

−

mA

Isink

Sink current capability at VDRV = 10 V

−

800

−

mA

VDRVlow

DRV pin level at VCC close to VCCmin with a 33 kW resistor to GND and a 1 nF

capacitor to GND

7.6

−

V

VDRVhigh DRV pin level at VCC = 28 V with a 1 nF capacitor to GND (Note 3)

−

17

V

DEMAGNETIZATION INPUT

Vth

Input threshold voltage (VZCD(pin) decreasing)

35

55

90

mV

VH

Hysteresis (VZCD(pin) increasing)

15

35

55

mV

VCH

VCL

Input clamp voltage

High state (IZCD(pin) = 3.0 mA)

Low state (IZCD(pin) = −2.0 mA)

8

−0.9

10

−0.7

12

0

V

Tdem

Demag propagation delay (VZCD(pin) decreasing from 4 V to −0.3 V)

−

150

250

ns

Cpar

Internal input capacitance at VZCD(pin) = 1 V

−

10

−

pF

Tblank

Blanking Delay after tON

2

3

4

ms

Tout

Timeout after last demag transition

4

5.25

6.5

ms

CURRENT COMPARATOR

IIB

Input Bias Current @ 1 V input level on CS pin

−

0.02

−

mA

ILimit1

Maximum internal current setpoint – TJ = 25°C – OPP pin grounded

0.76

0.8

0.84

V

ILimit2

Maximum internal current setpoint – TJ from −40°C to 125°C – OPP pin grounded

0.744

0.8

0.856

V

Ipeak_VCO Percentage of maximum peak current level at which VCO takes over (Note 4)

22

25

28

%

TDEL

Propagation delay from current detection to gate OFF state

−

100

160

ns

TLEB

Leading Edge Blanking Duration

TJ = −5°C to +125°C

TJ = −40°C to +125°C

240

295

350

360

ns

3. Minimum value for TJ = 125°C.

4. The peak current setpoint goes down as the load decreases. It is frozen below Ipeak_VCO (Ipeak = cst)

5. If negative voltage in excess to −300 mV is applied to OPP pin, the current setpoint decrease is no longer guaranteed to be linear.

6. NTC on OTP pin with R = 8.8 kW at 110°C.

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