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CYUSB3012-BZXC Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CYUSB3012-BZXC Datasheet(HTML) 1 Page - Cypress Semiconductor |
1 / 40 page CYUSB301X EZ-USB® FX3 SuperSpeed USB Controller Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-52136 Rev. *L Revised August 16, 2012 Features ■ Universal serial bus (USB) integration ❐ USB 3.0 and USB 2.0 peripherals compliant with USB 3.0 specification 1.0 ❐ 5-Gbps USB 3.0 PHY compliant with PIPE 3.0 ❐ High-speed On-The-Go (HS-OTG) host and peripheral compliant with OTG Supplement Version 2.0 ❐ Thirty-two physical endpoints ❐ Support for battery charging Spec 1.1 and accessory charger adaptor (ACA) detection ■ General Programmable Interface (GPIF™ II) ❐ Programmable 100-MHz GPIF II enables connectivity to a wide range of external devices ❐ 8-, 16-, and 32-bit data bus ❐ As many as16 configurable control signals ■ Fully accessible 32-bit CPU ❐ ARM926EJ core with 200-MHz operation ❐ 512-KB or 256-KB embedded SRAM ■ Additional connectivity to the following peripherals ❐ I 2C master controller at 1 MHz ❐ I 2S master (transmitter only) at sampling frequencies of 32 kHz, 44.1 kHz, and 48 kHz ❐ UART support of up to 4 Mbps ❐ SPI master at 33 MHz ■ Selectable clock input frequencies ❐ 19.2, 26, 38.4, and 52 MHz ❐ 19.2-MHz crystal input support ■ Ultra low-power in core power-down mode ❐ Less than 60 µA with VBATT on and 20 µA with VBATT off ■ Independent power domains for core and I/O ❐ Core operation at 1.2 V ❐ I 2S, UART, and SPI operation at 1.8 to 3.3 V ❐ I 2C operation at 1.2 V ■ 10- × 10-mm, 0.8-mm pitch Pb-free ball grid array (BGA) package ■ EZ-USB ® software and development kit (DVK) for easy code development Applications ■ Digital video camcorders ■ Digital still cameras ■ Printers ■ Scanners ■ Video capture cards ■ Test and measurement equipment ■ Surveillance cameras ■ Personal navigation devices ■ Medical imaging devices ■ Video IP phones ■ Portable media players ■ Industrial cameras 32 EPs GPIF™ II HS/FS Peripheral SS Peripheral HS/FS/ LS OTG Host ARM926EJ -S JTAG UART SPI I2S Embedded SRAm (512 kB/ 256 KB) EZ-Dtect™ CTL[12:0] INT# RESET # DQ[31: 0]/ DQ[15: 0] PMODE[2:0 ] OTG_ID SSRX - SSRX + SSTX - SSTX + D+ D- FSLC[0] FSLC[1] FSLC[2] CLKIN CLKIN_32 XTALIN XTALOUT I2C Logic Block Diagram |
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