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TC7USB221WBG Datasheet(PDF) 4 Page - Toshiba Semiconductor

Part No. TC7USB221WBG
Description  Dual SPDT USB Switch
Download  11 Pages
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC7USB221WBG
4
10.
10.
10.
10. Electrical Characteristics
Electrical Characteristics
Electrical Characteristics
Electrical Characteristics
10.1.
10.1.
10.1.
10.1. DC Characteristics (Unless otherwise specified, T
DC Characteristics (Unless otherwise specified, T
DC Characteristics (Unless otherwise specified, T
DC Characteristics (Unless otherwise specified, Taaaa = -40 to 85
= -40 to 85
= -40 to 85
= -40 to 85
))))
Characteristics
High-level input voltage (OE, S)
Low-level input voltage (OE, S)
Input leakage current (OE, S)
Power-OFF leakage current
Switch OFF-state leakage
current
ON-resistance
Difference of ON-resistance
between switches
ON-resistance flatness
Quiescent supply current
Symbol
VIH
VIL
IIN
IOFF
ISZ
RON
∆RON
RON(flat)
ICC
∆ICC
Note
(Note 1),
(Note 2)
Test Condition
VIN = 0 to 3.6 V
VIN = VIS = 0 to 3.6 V
VIS = 0 to VCC, OE = VCC
VIS = 0 V, IIS = 30 mA
VIS = 0.4 V, IIS = 30 mA
VIS = 3.0 V, IIS = 30 mA
VIS = 0.4 V, 1.0 V,
IIS = 30 mA
VIS = 0 V to 1.0 V,
IIS = 30 mA
VIN = VCC or GND,
IOUT = 0 A
VIN = 1.8 V (one input)
VCC (V)
2.3 to 3.6
2.3 to 3.6
2.3 to 3.6
0
2.3 to 3.6
3.0
3.0
3.0
3.0
3.0
3.6
3.6
Min
0.46 ×
VCC
Typ.
6.5
7
13
0.5
1.6
Max
0.25 ×
VCC
±1.0
±5.0
±5.0
10
11
19
2.0
10.0
Unit
V
µA
µA
Note 1: All typical values are at Ta = 25.
Note 2: Measured by the voltage drop between D+/D- and 1D+/1D-,2D+/2D- pins at the indicated current through the
switch. On-resistance is determined by the lower of the voltages on the two pins.
10.2.
10.2.
10.2.
10.2. AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, Taaaa = -40 to 85
= -40 to 85
= -40 to 85
= -40 to 85
))))
Characteristics
Propagation delay time
Turn-ON time
(S, OE to output)
Turn-OFF time
(S, OE to output)
Break before Make
Skew of opposite transitions of
the same output (tPHL - tPLH)
Output skew (center port to any
other port)
Symbol
tPLH/tPHL
ton
toff
TBBM
tSK(P)
tSK(O)
Note
(Note 1)
(Note 1)
(Note 1)
Test Condition
CL = 5 pF, See Fig. 11.1
RL = 50 Ω, CL = 5 pF,
See Fig. 11.2
RL = 50 Ω, CL = 5 pF,
See Fig. 11.3
CL = 5 pF, See Fig. 11.4
CL = 5 pF, See Fig. 11.5
VCC (V)
3.3 ± 0.3
Min
2
Typ.
0.25
7.5
3.3
0.1
0.1
Max
17
10
7.0
Unit
ns
Note 1: Parameter guaranteed by design.
10.3.
10.3.
10.3.
10.3. Analog Switch (Note) (Unless otherwise specified, T
Analog Switch (Note) (Unless otherwise specified, T
Analog Switch (Note) (Unless otherwise specified, T
Analog Switch (Note) (Unless otherwise specified, Taaaa = -40 to 85
= -40 to 85
= -40 to 85
= -40 to 85
))))
Characteristics
OFF isolation (non-adjacent)
Crosstalk (non-adjacent)
-3dB Bandwidth
Symbol
OIRR
Xtalk
BW
Note
Test Condition
RT = 50 Ω, f = 240 MHz,
See Fig. 11.6
RT = 50 Ω, f = 240 MHz,
See Fig. 11.7
RL = 50 Ω, CL = 0 pF,
See Fig. 11.8
VCC (V)
3.3 ± 0.3
Min
Typ.
-36
-36
820
Max
Unit
dB
MHz
Note:
Parameter guaranteed by design.
2011-07-22
Rev.1.0




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