TC74AC138P/F/FT

2012-02-29

1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC138P,TC74AC138F,TC74AC138FT

3-to-8 Line Decoder

The TC74AC138 is an advanced high speed CMOS 3-to-8 LINE

DECODER fabricated with silicon gate and double-layer metal

wiring C2MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

When the device is enabled, 3 Binary Select inputs (A, B and

C) determine which one of the outputs ( 0

Y - 7

Y ) will go low.

When enable input G1 is held low or either

A

2

G

or

2B

G

is

held high, decoding function is inhibited and all outputs go high.

G1,

A

2

G

, and

2B

G

inputs are provided to ease cascade

connection and for use as an address decoder for memory

systems.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

Capability of driving 50 Ω

transmission lines.

• Pin and function compatible with 74F138

TC74AC138P

TC74AC138F

TC74AC138FT

Weight

DIP16-P-300-2.54A

: 1.00 g (typ.)

SOP16-P-300-1.27A

: 0.18 g (typ.)

TSSOP16-P-0044-0.65A

: 0.06 g (typ.)