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CXD1196 Datasheet(PDF) 11 Page - Sony Corporation |
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CXD1196 Datasheet(HTML) 11 Page - Sony Corporation |
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11 / 28 page  —11— CXD1196AR 3. DSP Interface for CD BCLK DATA LRCK C2PO Tbck Tbck Tsb1 Thb1 Thb2 Tsb2 BCLK DATA LRCK C2PO Tsb1 Thb1 Thb2 Thb2 Tbck Tbck BCKRED= “H” BCKRED= “L” Item BCLK frequency BCLK pulse width Data setting time (with respect to BCLK) Data holding time (with respect to BCLK) LRCK, C2PO setting time (with respect to BCLK) LRCK, C2PO holding time (with respect to BCLK) Symbol Fbck Tbck Tsb1 Thb1 Tsb2 Thb2 Min. 85 50 50 50 50 Typ. Max. 5.7 Unit MHz ns ns ns ns ns |
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