IS64WV1288EEBLL-10CTA3 datasheet(4/16 Pages) ISSI

Part #	IS64WV1288EEBLL-10CTA3

Description	256K x 8 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH ECC

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

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Integrated Silicon Solution, Inc. — www.issi.com

Rev. 00A

10/10/2012

IS61/64WV1288EEBLL

POWER SUPPLY CHARACTERISTICS(1) (OverOperatingRange)

-8

-10

-20

Symbol Parameter

Test Conditions

Min. Max.

Unit

iCC

VddDynamicOperating Vdd = Max.,

Com.

—40

—30

—25

mA

Supply Current

iOut = 0 mA, f = fmax

Ind.

—45

—35

—30

Auto.

——

—50

—45

typ.(2)

21

iCC1

Operating

Vdd = Max.,

Com.

—20

mA

Supply Current

iOut = 0 mA, f = 0

Ind.

—25

Auto.

——

—40

isb1

TTLStandbyCurrent

Vdd = Max.,

Com.

—

10

—

10

—10

mA

(TTLInputs)

Vin = Vih or Vil

Ind.

—15

CE ≥

Vih,f=0

Auto.

——

—30

isb2

CMOS Standby

Vdd = Max.,

Com.

—

5

—

5

—

5

mA

Current(CMOSInputs) CE ≥ Vdd – 0.2V,

Ind.

—

6

—

6

—

6

Vin ≥ Vdd – 0.2V, or

Auto.

——

—15

—

15

Vin ≤ 0.2V, f = 0

typ.(2)

1.5

Note:

1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

2.TypicalvaluesaremeasuredatVdd=3.0V,Ta=25oC and not 100% tested.

DC ELECTRICAL CHARACTERISTICS (OverOperatingRange)

VDD = 2.4V-3.6V

Symbol Parameter

Test Conditions

Min.

Max.

Unit

VOh

OutputHIGHVoltage

Vdd = Min., iOh = –1.0mA

1.8

—

V

VOl

OutputLOWVoltage

Vdd = Min., iOl = 1.0mA

—

0.4

V

Vih

InputHIGHVoltage

2.0

Vdd + 0.3

V

Vil

InputLOWVoltage(1)

–0.3

0.8

V

ili

InputLeakage

GND≤ Vin ≤ Vdd

–1

1

µA

ilO

OutputLeakage

GND≤ VOut ≤ Vdd, OutputsDisabled

–1

1

µA

Note:

1. Vil (min.) = –0.3VDC;Vil(min.)=–2.0VAC(pulsewidth<2ns).Not100%tested.

Vih (max.) = Vdd + 0.3V dC; Vih (max.) = Vdd + 2.0V aC(pulsewidth<2ns).Not100%tested.

DC ELECTRICAL CHARACTERISTICS (OverOperatingRange)

VDD = 3.3V + 10%

Symbol Parameter

Test Conditions

Min.

Max.

Unit

VOh

OutputHIGHVoltage

Vdd = Min., iOh = –4.0mA

2.4

—

V

VOl

OutputLOWVoltage

Vdd = Min., iOl = 8.0mA

—

0.4

V

Vih

InputHIGHVoltage

2

Vdd + 0.3

V

Vil

InputLOWVoltage(1)

–0.3

0.8

V

ili

InputLeakage

GND≤ Vin ≤ Vdd

–1

1

µA

ilO

OutputLeakage

GND≤ VOut ≤ Vdd, OutputsDisabled

–1

1

µA

Note:

1. Vil (min.) = –0.3VDC;Vil(min.)=–2.0VAC(pulsewidth<2ns).Not100%tested.

Vih (max.) = Vdd + 0.3V dC; Vih (max.) = Vdd + 2.0V aC(pulsewidth<2ns).Not100%tested.

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