– 9 –

CXD2428Q

2. Control Mode

The following timing and modes are changed by control data:

Variable

Address

Function

H SHIFT

00H

Horizontal write start timing

V SHIFT

10H

Vertical write start timing

H PHASE

20H

Horizontal readout start timing

V PHASE

30H

Vertical readout start timing

H SZ RD

40H

Number of readout line dots (0 to 7 bits)

50H

Number of readout line dots (8 to 10 bits)

H SZ WR

41H

Number of write line dots (0 to 7 bits)

51H

Number of write line dots (8 to 10 bits)

LN DAT0 to 7

60 to 67H

Conversion mode address

MD DAT0 to 7

70 to 77H

Conversion mode data

TOP BLK

A0H

Vertical blanking rise timing

BTM BLK

B0H

Vertical blanking fall timing

LFT BLK

C0H

Horizontal blanking rise timing

RGT BLK

D0H

Horizontal blanking fall timing

IODAT

80H

I/O port output data

IOSL

E0H

OUT port select

TEST

90H

Serial transfer timing

SCLK

SCTL

SDAT

ADDRESS

DATA

Description of Operation

1. CXD2428Q Control System

The operation timing of this IC is controlled by serial data.

An 8-bit address and 8-bit data are sequentially transferred from the falling edge of SCTL, and each control

data is taken in at the rising edge of SCLK up to the rising edge of SCTL.