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M2S005-1FG144YES Datasheet(PDF) 3 Page - Microsemi Corporation

Part # M2S005-1FG144YES
Description  SmartFusion2 System-on-Chip FPGAs
Download  156 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

M2S005-1FG144YES Datasheet(HTML) 3 Page - Microsemi Corporation

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SmartFusion2 System-on-Chip FPGAs
R e visi on 0
III
SmartFusion2 SoC FPGA Block Diagram
Acronyms
AES
Advanced Encryption Standard
MDDR
DDR2/3 Controller in MSS
AHB
Advanced High-Performance Bus
MMUART Multi-Mode UART
APB
Advanced Peripheral Bus
MPU
Memory Protection Unit
AXI
Advanced eXtensible Interface
MSS
Microcontroller Subsystem
COMM_BLK
Communication Block
SECDED Single Error Correct Double Error Detect
DDR
Double Data Rate
SEU
Single Event Upset
DPA
Differential Power Analysis
SHA
Secure Hashing Algorithm
ECC
Elliptical Curve Cryptography
SMC_FIC Soft Memory Controller
EDAC
Error Detection And Correction
TSE
Triple Speed Ethernet (10/100/1000 Mbps)
ETM
Embedded Trace Macrocell
ULPI
UTMI + Low Pin Interface
FDDR
DDR2/3 controller in FPGA fabric
UTMI
USB 2.0 Transceiver Macrocell Interface
FIC
Fabric Interface Controller
WDT
Watchdog Timer
FIIC
Fabric Interface Interrupt Controller
XAUI
10 Gbps Attachment Unit Interface
HS USB OTG High Speed USB 2.0 On-The-Go
XGMII
10 Gigabit Media Independent Interface
IAP
In-Application Programming
XGXS
XGMII Extended Sublayer
MACC
Multiply-Accumulate
FPGA Fabric
Micro SRAM
(64x18)
Micro SRAM
(64x18)
Large SRAM
(1024x18)
Large SRAM
(1024x18)
Math Block
MACC (18x18)
Math Block
MACC (18x18)
DDR
Bridge
MSS
DDR Controller
+ PHY
Serial Controller 0
(PCIe, XAUI/XGXS)
+ Native SERDES
Instruction
Cache
eSRAM
TSE MAC
HPDMA
FIC_1
FIC_0
COMM_BLK
OSCs
PLLs
SYSREG
eNVM
HS USB
OTG ULPI
PDMA
APB
SRAM-PUF
JTAG I/O
DDR User I/O
DDR User I/O
Serial 1 I/O
Serial 0 I/O
SPI I/O
Multi-Standard User I/O (MISO)
SHA256
AES256
In-Application
Programming
NRBG
ECC
Flash*Freeze
FIIC
RTC
WDT
CAN
SPI x 2
MMUART x 2
I2C x 2
Timer x 2
AHB Bus Matrix (ABM)
MPU
ARM® Cortex-M3
Microcontroller
Subsystem (MSS)
System Controller
ETM
S
D
AHB
AXI/AHB/XGXS
Config
Fabric DDR
Controller + PHY
AXI/AHB
Config
Serial Controller 1
(PCIe, XAUI/XGXS)
+ Native SERDES
AXI/AHB/XGXS
Config
SMC_FIC
AXI/AHB
Config
AHB
AHB
Interupts
I
FPGA Fabric
Micro
Standard Cell /
SEU Immune
Flash Based /
SEU Immune


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