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M2S025-1FG144Y Datasheet(PDF) 9 Page - Microsemi Corporation |
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M2S025-1FG144Y Datasheet(HTML) 9 Page - Microsemi Corporation |
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9 / 156 page  R e visio n 0 1 -1 1 – SmartFusion2 Device Family Overview Microsemi’s SmartFusion2 SoC FPGAs integrate fourth generation flash-based FPGA fabric, an ARM Cortex-M3 processor and high performance communications interfaces on a single chip. The SmartFusion2 family is the industry’s lowest power, highest reliability and most secure programmable logic solution. This next generation SmartFusion2 architecture offers up to 3.6X gate count implemented with 4-input look-up table (LUT) fabric with carry chains, giving 2X performance, and includes multiple embedded memory options and math blocks for DSP. The 166 MHz ARM Cortex-M3 processor is enhanced with ETM and 8 Kbyte instruction cache, and additional peripherals including CAN, Gigabit Ethernet, and high speed USB. High speed serial interfaces enable PCIe, XAUI / XGXS + Native SERDES communication while DDR2/DDR3 memory controllers provide high speed memory interfaces. SmartFusion2 Chip Layout MSS DDR East IOs 4 PLLs 4 PLLs West IOs 3 PLLs Column Access FPGA Fabric SERDES uSRAM (1 Kb) Math Blocks LSRAM (18 Kb) SERDES eNVM Oscillators HVBias MSS Crystal Fabric DDR |
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