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CXK77B3610GB- Datasheet(PDF) 6 Page - Sony Corporation |
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CXK77B3610GB- Datasheet(HTML) 6 Page - Sony Corporation |
6 / 16 page – 6 – CXK77B3610GB • AC Electrical Characteristics Address access (except Register-Register mode) Clock period Clock pulse high Clock pulse low Setup time Hold time Clock high to output (R-R mode) Clock high to output (R-F mode, R-L mode) Clock low to output (R-L mode) Write cycle clock high to following Read cycle output (R-F mode, R-L mode) Clock high to output high impedance (S deselect cycle) Write cycle clock high to output high impedance (R-F mode, R-L mode) Clock high to output low impedance (R-R mode) Clock high to output low impedance (R-F mode) Clock low to output low impedance (R-L mode) Output enable to output valid (G) Output enable to output in low Z (G) Output disable to output in high Z (G) tAA tKP tKH tKL tS tH tKQ tKQ1 tKQ2 tKQ3 tHZ∗2 tWHZ∗2 tLZ∗2 tLZ1∗2 tLZ2∗2 tOE tOLZ∗2 tOHZ∗2 — 6 2 2 0.5 1 1.5∗2 — 1.5∗2 1.5 1.5 1.5 2 1.5 — 1 — 9 — — — — — 3 6 3 15 3 3 — — — 3 — 3 — 7 3 3 1 1 1.5∗2 — 1.5∗2 1.5 1.5 1.5 2 1.5 — 1 — 10 — — — — — 3.5 7 3.5 17 3.5 3.5 — — — 3.5 — 3.5 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Item Symbol -6 Min. Max. -7 Min. Max. Unit ∗1 All parameters are specified over the range 0 to 70°C. ∗2 These parameters are sampled and are not 100% tested. AC characteristics • AC test conditions (VDD = 3.3V ± 0.15V, Ta = 0 to 70°C) Input pulse high level Input pulse low level Input rise & fall time Input reference level Clock input reference level Clock input differential signal Clock input rise & fall time Output reference level Output load conditions Item VIH = 2.4V VIL = 0.4V 1V/ns 2.0/0.8V K/K cross; C/C cross 0.8V 1V/ns 1.4V Fig. 1 Conditions Fig. 1. I/O 50 Ω 50 Ω 1.4V I/O 868 Ω 1178 Ω 3.3V 5pF∗1 Output Load (1) Output Load (2) ∗2 ∗1 Including scope and jig capacitance. ∗2 For t LZ , tHZ. |
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