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CXP842P24 Datasheet(PDF) 6 Page - Sony Corporation |
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CXP842P24 Datasheet(HTML) 6 Page - Sony Corporation |
6 / 20 page – 6 – CXP842P24 Port B Data bus RD (Port B) Port B direction IP Port B data Pull-up resistance "0" when reset "0" when reset ∗ Pull-up transistors approx. 10k Ω ∗ Schmitt input CINT CS0 SI0 SI1 8 pins Hi-Z Hi-Z When reset PA0/AN0 to PA7/AN7 PB0/CINT PB1/CS0 PB3/SI0 PB6/SI1 Port B 4 pins 2 pins Hi-Z PB2/SCK0 PB5/SCK1 Data bus RD (Port A) Port A direction IP Port A data Pull-up resistance Port A input selection Input protection circuit "0" when reset "0" when reset "0" when reset Input multiplexer A/D converter ∗ Pull-up transistors approx. 10k Ω ∗ Input/Output Circuit Formats for Pins Port A Pin Circuit format Data bus RD (Port B) IP Port B output selection "0" when reset ∗ Pull-up transistors approx. 10k Ω ∗ Schmitt input SCK in Port B data Port B direction "0" when reset Pull-up resistance "0" when reset SCK OUT Output enable |
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