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CXP847P60 Datasheet(PDF) 11 Page - Sony Corporation |
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CXP847P60 Datasheet(HTML) 11 Page - Sony Corporation |
11 / 29 page – 11 – CXP847P60 PF6/TxD Control for transmission and ports "0" when reset UART transmission circuit Data bus RD (Port F) Port F data "1" when reset High level 1 pin Port F 8 pins PG0/PWM0 to PG7/PWM7 Data bus RD (Port G) IP Port G function selection "0" when reset ∗ Port G data Port G direction "0" when reset Pull-up resistor PWM "0" when reset ∗ Pull-up transistors approx. 100k Ω (VDD = 4.5 to 5.5V) approx. 300k Ω (VDD = 3.0 to 3.6V) Port G Hi-Z 5 pins Hi-Z Data bus RD (Port I) IP Port I data "0" when reset ∗ Port I direction Pull-up resistor "0" when reset INT0 INT1 INT2 INT3 INT4 Schmitt input ∗ Pull-up transistors approx. 100k Ω (VDD = 4.5 to 5.5V) approx. 300k Ω (VDD = 3.0 to 3.6V) Port I PI0/INT0 to PI4/INT4 Hi-Z AN0 to AN3 IP A/D converter Input multiplexer 4 pins When reset Pin Circuit format |
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