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MAX11324 Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX11324 Datasheet(HTML) 3 Page - Maxim Integrated Products |
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3 / 37 page  3 Maxim Integrated MAX11321–MAX11328 1Msps, 10-/12-Bit, 4-/8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access ELECTRICAL CHARACTERISTICS (MAX11322/MAX11325/MAX11328) (continued) (VDD = 2.35V to 3.6V, VOVDD = 1.5V to 3.6V, fSAMPLE = 1Msps, fSCLK = 16MHz, 50% duty cycle, VREF+ = VDD, TA = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Crosstalk -0.5dB below full-scale of 99.2432kHz sine wave input to the channel being sampled, apply full-scale 69.2139kHz sine wave signal to all 15 nonselected input channels. -88 dB CONVERSION RATE Power-Up Time tPU Conversion cycle, external clock 2 Cycles Acquisition Time tACQ 156 ns Conversion Time tCONV Internally clocked (Note 8) 5.9 µs Externally clocked, fSCLK = 16MHz, 16 cycles (Note 8) 1000 ns External Clock Frequency fSCLK 0.16 16 MHz Aperture Delay 8 ns Aperture Jitter RMS 30 ps ANALOG INPUT Input Voltage Range VINA Unipolar, (single ended and pseudo- differential) 0 VREF+ V Bipolar (Note 9) Range bit set to 0 -VREF+/2 VREF+/2 Range bit set to 1 -VREF+ VREF+ Absolute Input Voltage Range AIN+, AIN- relative to GND -0.1 VREF+ + 0.1 V Static Input Leakage Current IILA VAIN = VDD, GND -0.1 Q 1.5 F A Input Capacitance CAIN During acquisition time; RANGE bit = 0 (Note 10) 15 pF During acquisition time; RANGE bit = 1 (Note 10) 7.5 EXTERNAL REFERENCE INPUT REF- Input Voltage Range VREF- -0.3 +1 V REF+ Input Voltage Range VREF+ 1 VDD + 50mV V REF+ Input Current IREF+ VREF+ = 2.5V, fSAMPLE = 1Msps 36.7 F A VREF+ = 2.5V, fSAMPLE = 0Msps 0.1 DIGITAL INPUTS (SCLK, DIN, CS, CNVST) Input Voltage Low VIL VOVDD O 0.25 V Input Voltage High VIH VOVDD O 0.75 V Input Hysteresis VHYST VOVDD O 0.15 mV |
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