© 2011 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FT3001 • Rev. 1.0.4

7

Functional Description

The reset timer uses an internal oscillator and a two-

stage 21-bit counter to determine when the output pins

switch. The time, n, is set by the hard-wired logic level

of the DSR0 and DSR1 pins. See Table 1 & 2.

Table 1.

FT3001UMX Truth Table

DSR0

DSR1

Reset Time (

20%)

in Seconds

0

0

3.00

0

1

3.75

1

0

4.50

1

1

6.00

Table 2.

FT3001MPX Truth Table

DSR0

Reset Time (

20%)

in Seconds

0

3.0

1

4.5

The two CMOS input pins, /SR0 and /SR1, control the

reset function. A low input signal on both /SR0 and /SR1

starts the oscillator. Both /SR0 and /SR1 pins must be

held LOW for time n before the /RST1 and RST2

outputs are activated. The TRIG pin should be tied LOW

during normal operation. The TRIG pin is used for

SCAN testing.

Application Information

IMPORTANT

: The DSR0 and DSR1 pins must be tied

voltage level. The voltage level on the DSR pin

determines the length of the configurable delay. The

voltage level on the DSR pins must not change during

normal operation. Do not use pull-up or pull-down

resistors on DSR pins.

Short Duration (Button Press Time < n)

In this case, both input /SR0 and /SR1 are LOW for a

goes LOW, the internal timer starts counting. If the input

goes HIGH before time n, the timer stops counting and

resets and no changes occur on the outputs.

In this case, both input /SR0 and /SR1 are LOW for a

goes LOW, the internal timer starts counting.

After time n, the outputs switch and the timer stops

original states.

Table 3.

Short Duration

/SR0

/SR1

/RST1

RST2

Description

L

H

L

The timer starts counting when both inputs go LOW. The timer stops

counting and resets when either input goes high. No changes occur on the

outputs. Both /SR0 and /SR1 need to be LOW to activate (start) the timer.

Figure 8. Short Duration

Figure 9. Long Duration

Table 4.

Long Duration

/SR0

/SR1

/RST1

RST2

Description

L

The timer starts counting when both inputs go LOW. After time n, the

Both /SR0 and /SR1 need to be LOW to activate (start) the timer.

L