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FAN3227CMX Datasheet(PDF) 2 Page - Fairchild Semiconductor

Part # FAN3227CMX
Description  Dual 2A High-Speed, Low-Side Gate Drivers
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN3227CMX Datasheet(HTML) 2 Page - Fairchild Semiconductor

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© 2012 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN3226 / FAN3227 / FAN3228 / FAN3229_F085 • Rev. 1.0.0
2
Ordering Information
Part Number
Logic
Input
Threshold
Package
Eco
Status
Packing
Method
Quantity
per Reel
FAN3226CMX_F085
Dual Inverting Channels +
Dual Enable
CMOS
SOIC-8
RoHS
Tape & Reel
2,500
FAN3226TMX_F085
TTL
SOIC-8
RoHS
Tape & Reel
2,500
FAN3227CMX_F085
Dual Non-Inverting Channels
+ Dual Enable
CMOS
SOIC-8
RoHS
Tape & Reel
2,500
FAN3227TMX_F085
TTL
SOIC-8
RoHS
Tape & Reel
2,500
FAN3228CMX_F085
Dual Channels of Two-Input
/ One-Output Drivers, Pin
Configuration 1
CMOS
SOIC-8
RoHS
Tape & Reel
2,500
FAN3228TMX_F085
TTL
SOIC-8
RoHS
Tape & Reel
2,500
FAN3229CMX_F085
Dual Channels of Two-Input
/ One-Output Drivers, Pin
Configuration 2
CMOS
SOIC-8
RoHS
Tape & Reel
2,500
FAN3229TMX_F085
TTL
SOIC-8
RoHS
Tape & Reel
2,500
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Package Outline
Figure 2. SOIC-8 (Top View)
Thermal Characteristics(1)
Package
JL
(2)
JT
(3)
JA
(4)
JB
(5)
JT
(6)
Units
8-Pin Small Outline Integrated Circuit (SOIC)
40
31
89
43
3.0
°C/W
Notes:
1.
Estimates derived from thermal simulation; actual values depend on the application.
2.
Theta_JL (
JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any
thermal pad) that are typically soldered to a PCB.
3.
Theta_JT (
JT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is
held at a uniform temperature by a top-side heatsink.
4.
Theta_JA (
ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.
The value given is for natural convection with no heatsink, as specified in JEDEC standards JESD51-2, JESD51-5, and
JESD51-7, as appropriate.
5.
Psi_JB (
JB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an
application circuit board reference point for the thermal environment defined in Note 4. For the SOIC-8 package, the board
reference is defined as the PCB copper adjacent to pin 6.
6.
Psi_JT (
JT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and
the center of the top of the package for the thermal environment defined in Note 4.


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