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74VHCT08A_08 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. 74VHCT08A_08
Description  Quad 2-Input AND Gate
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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©1997 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74VHCT08A Rev. 1.3.0
February 2008
74VHCT08A
Quad 2-Input AND Gate
Features
High speed: tPD = 5.0ns (typ.) at TA = 25°C
High noise immunity: VIH = 2.0V, VIL = 0.8V
Power down protection is provided on all inputs and
outputs
Low noise: VOLP = 0.8V (max.)
Low power dissipation: ICC = 2µA (max.) @ TA = 25°C
Pin and function compatible with 74HCT08
General Description
The VHCT08A is an advanced high speed CMOS 2
Input AND Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
The internal circuit is composed of 4 stages including
buffer output, which provide high noise immunity and
stable output.
Protection circuits ensure that 0V to 7V can be applied to
the input pins without regard to the supply voltage and to
the output pins with VCC = 0V. These circuits prevent
device destruction due to mismatched supply and input/
output voltages. This device can be used to interface 3V
to 5V systems and two supply systems such as battery
backup.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number
Package Description
74VHCT08AM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
74VHCT08ASJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT08AMTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
74HCT08AN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide




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