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74VHCT00ASJ_07 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. 74VHCT00ASJ_07
Description  Quad 2-Input NAND Gate
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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©1997 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74VHCT00A Rev. 1.4.0
4
DC Electrical Characteristics
Noise Characteristics
Note:
5. Parameter guaranteed by design.
AC Electrical Characteristics
Note:
6. CPD is defined as the value of the internal equivalent capacitance, which is calculated from the operating
current consumption without load. Average operating current can be obtained from the equation:
ICC (Opr.) = CPD • VCC • fIN + ICC / 4 (per gate)
Symbol
Parameter
VCC (V)
Conditions
TA = 25°C
TA = –40°C
to +85°C
Units
Min.
Typ.
Max.
Min.
Max.
VIH
HIGH Level Input
Voltage
4.5
2.0
2.0
V
5.5
2.0
2.0
VIL
LOW Level Input
Voltage
4.5
0.8
0.8
V
5.5
0.8
0.8
VOH
HIGH Level Output
Voltage
4.5
VIN = VIH
or VIL
IOH = –50µA
4.40
4.50
4.40
V
IOH = –8mA
3.94
3.80
VOL
LOW Level Output
Voltage
4.5
VIN = VIH
or VIL
IOL = 50µA
0.0
0.1
0.1
V
IOL = 8mA
0.36
0.44
IIN
Input Leakage
Current
0 – 5.5
VIN = 5.5V or GND
±0.1
±1.0
µA
ICC
Quiescent Supply
Current
5.5
VIN = VCC or GND
2.0
20.0
µA
ICCT
Maximum ICC / Input
5.5
VIN = 3.4V, Other
Inputs
= V
CC or GND
1.35
1.50
mA
IOFF
Output Leakage
Current (Power
Down State)
0.0
VOUT = 5.5V
0.5
5.0
µA
Symbol
Parameter
Conditions
VCC (V)
TA = 25°C
Units
Typ.
Limit
VOLP
(5)
Quiet Output Maximum Dynamic VOL
CL = 50pF
5.0
0.4
0.8
V
VOLV
(5)
Quiet Output Minimum Dynamic VOL
CL = 50pF
5.0
–0.4
–0.8
V
VIHD
(5)
Minimum HIGH Level Dynamic Input Voltage
CL = 50pF
5.0
2.0
V
VILD
(5)
Maximum LOW Level Dynamic Input Voltage
CL = 50pF
5.0
0.8
V
Symbol
Parameter
VCC (V)
Conditions
TA = 25°C
TA = –40°C
to +85°C
Units
Min.
Typ.
Max.
Min.
Max.
tPLH, tPHL
Propagation Delay
5.0 ± 0.5
CL = 15pF
5.0
6.9
1.0
8.0
ns
CL = 50pF
5.5
7.9
1.0
9.0
CIN
Input Capacitance
VCC = Open
4
10
10
pF
CPD
Power Dissipation
Capacitance
(6)
17
pF




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