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AD9915BCPZ Datasheet(PDF) 9 Page - Analog Devices |
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AD9915BCPZ Datasheet(HTML) 9 Page - Analog Devices |
9 / 48 page Data Sheet AD9915 Rev. A | Page 9 of 48 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic I/O1 Description 1, 2, 13 to 15, 68 to 72, 75 to 81, 87, 88 D5 to D7, D16 to D31, D27 to D31 I/O Parallel Port Pins. The 32-bit parallel port offers the option for serial or parallel programming of the internal registers. In addition, the parallel port can be configured to provide direct FSK, PSK, or ASK (or combinations thereof) modulation data. The 32-bit parallel port configuration is set by the state of the four function pins (F0 to F3). 3 D15/A7 I/O Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 4 D14/A6 I/O Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 5 D13/A5 I/O Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 8 D12/A4 I/O Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 9 D11/A3 I/O Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 10 D10/A2 I/O Parallel Port Pin/Address Line. Multipurpose pin depending on the state of the function pins (F0 to F3). The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 11 D9/A1 I/O Parallel Port Pin/Address Line. Multipurpose pin depending on the state of the function pins (F0 to F3). The state of the F0 to F3 function pins determines if this pin acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the internal registers. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 D17 D16 D15/A7 D14/A6 D13/A5 DVDD (1.8V) DGND D12/A4 D11/A3 D10/A2 D9/A1 D8/A0 D7 D6 D5 DVDD_I/O (3.3V) 17 DGND 18 D4/SYNCIO 19 D3/SDO 20 D2/SDIO/WR 58 57 56 55 54 53 52 51 50 49 48 47 46 45 LOOP_FILTER 59 REF 60 AVDD (3.3V) 61 SYNC_OUT 62 SYNC_IN 63 DRCTL 64 DRHOLD 65 DROVER 66 OSK AVDD (1.8V) AVDD (1.8V) REF CLK REF CLK AVDD (3.3V) AVDD (3.3V) AGND AVDD (3.3V) AGND DAC_RSET AVDD (3.3V) AGND DAC_BP NOTES 1. THE EPAD MUST BE SOLDERED TO GROUND. 21 D1/SCLK/RD 22 D0/CS/PWD AD9915 TOP VIEW (Not to Scale) |
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