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FDME510PZT Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FDME510PZT Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 7 page ©2011 Fairchild Semiconductor Corporation FDME510PZT Rev.C1 www.fairchildsemi.com 2 Electrical Characteristics T J = 25 °C unless otherwise noted Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Drain-Source Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Units BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V -20 V ΔBV DSS ΔT J Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C -13 mV/°C IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V ±10 μA VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA -0.4 -0.5 -1.0 V ΔV GS(th) ΔT J Gate to Source Threshold Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C 3 mV/°C rDS(on) Drain to Source On Resistance VGS = -4.5 V, ID = -5 A 31 37 m Ω VGS = -2.5 V, ID = -4 A 38 50 VGS = -1.8 V, ID = -3 A 48 65 VGS = -1.5 V, ID = -2 A 57 100 VGS = -4.5 V, ID = -5 A , TJ = 125 °C 40 60 gFS Forward Transconductance VDS = -5 V, ID = -5 A 21 S Ciss Input Capacitance VDS = -10 V, VGS = 0 V, f = 1 MHz 1120 1490 pF Coss Output Capacitance 155 210 pF Crss Reverse Transfer Capacitance 140 210 pF td(on) Turn-On Delay Time VDD = -10 V, ID = -5 A VGS = -4.5 V, RGEN = 6 Ω 6.5 13 ns tr Rise Time 10 16 ns td(off) Turn-Off Delay Time 93 149 ns tf Fall Time 54 86 ns Qg Total Gate Charge VDD = -10 V, ID = -5 A VGS = -4.5 V 16 22 nC Qgs Gate to Source Gate Charge 1.6 nC Qgd Gate to Drain “Miller” Charge 4 nC VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = -1.6 A (Note 2) -0.6 -1.2 V trr Reverse Recovery Time IF = -5 A, di/dt = 100 A/μs 38 61 ns Qrr Reverse Recovery Charge 16 29 nC Notes: 1. RθJA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied. a. 60 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 175 °C/W when mounted on a minimum pad of 2 oz copper. |
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