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LCX037BLT Datasheet(PDF) 8 Page - Sony Corporation |
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LCX037BLT Datasheet(HTML) 8 Page - Sony Corporation |
8 / 25 page – 8 – LCX037BLT 2. Clock timing conditions (Ta = 25°C) (fHckn = 6.67MHz, fVck = 25.6kHz, fv = 60Hz) ∗4 Hckn means Hck1 and Hck2. ∗5 The minimum value of tdEnb is 800ns. When H-BLK has a long period and has some time to spare, take more time prior to other value. Hst rise time Hst fall time Hst data set-up time Hst data hold time Hckn rise time∗4 Hckn fall time∗4 Hck1 fall to Hck2 rise time Hck1 rise to Hck2 fall time Vst rise time Vst fall time Vst data set-up time Vst data hold time Vck rise time Vck fall time Enb rise time Enb fall time Horizontal video period completed to Enb fall time Enb width Vck rise/fall to Enb rise time Enb rise to Pst rise time Pst rise time Pst fall time Pst data set-up time Pst data hold time Pst rise to Hst rise time trHst tfHst tdHst thHst trHckn tfHckn to1Hck to2Hck trVst tfVst tdVst thVst trVck tfVck trEnb tfEnb tdEnb twEnb toEnb toPst trPst tfPst tdPst thPst toHst — — –10 65 — — –15 –15 — — 5 5 — — — — 800∗5 900 300 390 — — –10 65 — — — 0 75 — — 0 0 — — 10 10 — — — — 1000 1000 400 400 — — 0 75 4 30 30 10 85 30 30 15 15 100 100 15 15 100 100 100 100 1200 1100 500 410 30 30 10 85 — ns µs ns Item Symbol Min. Typ. Max. Unit HST HCK VST VCK ENB PST ×4 cycles of Hck |
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