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RT9709 Datasheet(PDF) 10 Page - Richtek Technology Corporation |
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RT9709 Datasheet(HTML) 10 Page - Richtek Technology Corporation |
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10 / 12 page  RT9709 10 DS9709-02 April 2011 www.richtek.com Figure 2. Recommended PCB Layout VIN traces should be wide enough to minimize inductance and handle the high currents. The trace running from input to chip should be placed carefully and shielded strictly. Input and output capacitors must be placed close to the part. The connection between pins and capacitor pads should be copper traces without any through-hole via connection. VIN VIN NC VOUT VOUT ILIM VB 9 8 7 1 2 3 4 5 10 GND WRN EN 11 GND COUT GND GND CIN RILIM RVB Output capacitor must be placed between GND and VOUT to reduce noise. Output capacitor must be placed between GND and VIN to reduce noise. The exposed pad and GND should be connected to a strong ground plane for heat sinking and noise prevention . |
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