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W29EE512P-70 Datasheet(PDF) 11 Page - Winbond |
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W29EE512P-70 Datasheet(HTML) 11 Page - Winbond |
11 / 22 page W29EE512 Publication Release Date: February 18, 2002 - 11 - Revision A7 Read Cycle Timing Parameters (VCC = 5.0V ±10%, VCC = 5.0 ±5% for 70 nS, VSS = 0V, TA = 0 to 70° C) PARAMETER SYM. W29EE512-70 W29EE512-90 W29EE512-12 UNIT MIN. MAX. MIN. MAX. MIN. MAX. Read Cycle Time TRC 70 - 90 - 120 - nS Chip Enable Access Time TCE - 70 - 90 - 120 nS Address Access Time TAA - 70 - 90 - 120 nS Output Enable Access Time TOE - 35 - 40 - 50 nS #CE High to High-Z Output TCHZ - 25 - 25 - 30 nS #OE High to High-Z Output TOHZ - 25 - 25 - 30 nS Output Hold from Address Change TOH 0 - 0 - 0 - nS Byte/Page-write Cycle Timing Parameters PARAMETER SYMBOL MIN. TYP. MAX. UNIT Write Cycle (Erase and Program) TWC - - 10 mS Address Setup Time TAS 0 - - nS Address Hold Time TAH 50 - - nS #WE and #CE Setup Time TCS 0 - - nS #WE and #CE Hold Time TCH 0 - - nS #OE High Setup Time TOES 0 - - nS #OE High Hold Time TOEH 0 - - nS #CE Pulse Width TCP 90 - - nS #WE Pulse Width TWP 90 - - nS #WE High Width TWPH 100 - - nS Data Setup Time TDS 35 - - nS Data Hold Time TDH 0 - - nS Byte Load Cycle Time TBLC - - 200 µS Notes: All AC timing signals observe the following guidelines for determining setup and hold times: (1) High level signal's reference level is VIH. (2) Low level signal's reference level is VIL. |
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