LE24CB642MC

No.2090-10/14

7 EEPROM read operations

7-1. Current address reading

The address equivalent to the memory address accessed last +1 is held as the internal address of the EEPROM for

both write* and read operations. Therefore, provided that the master device has recognized the position of the

EEPROM address pointer, data can be read from the memory address with the current address pointer without

specifying the word address.

As with writing, current address reading involves receiving the 7-bit device address and read command code “1”

following the start condition, at which time the EEPROM generates an acknowledge signal. After this, the 8-bit data

of the (n+1) address is output serially starting with the highest bits. After the 8 bits have been output, by not sending

an acknowledge signal and inputting the stop condition, the EEPROM completes the read operation and is set to

standby mode.

If the previous read address is the last address, the address for the current address reading is rolled over to become

address 0.

*: If the write data is 1 or more bytes but less than 32 bytes, the current address after page writing is the address

equivalent to the number of bytes to be written in the specified word address +1. If the write data is 32 or more bytes,

it is the designated word address. If the last address (A4-A0=11111b) on the page has been designated by byte write

as the word address, the first address (A4-A0=0000b) on the page serves as the internal address after writing.

7-2. Random read

Random read is a mode in which a selected memory address is specified and its data is read. The address is specified

by a dummy write input.

First, when the EEPROM receives the 7-bit device address and write command code "0" following the start condition,

it generates an acknowledge signal. It then receives 4-bit don’t-care bits and a 12-bit word address and generates an

acknowledge signal. These operations are used to load the word address to the address counter in the EEPROM.

Next, the start condition is input again, and the current read is performed. This generates the word address data that

was input using the dummy write input. After the data is generated, if the stop condition is input without the input of

an acknowledge signal, reading is completed, and standby mode is established.

SDA

1 0 1 0

R

R/W

ACK

Device Address

NO ACK

D7 D6 D5 D4 D3 D2 D1 D0

Data(n+1 address)

S1

S2

S0

SDA

1 0 1 0

A

10

A9 A8

W

R/W

ACK

Word address(n)

S2 S1 S0

*

ACK

D7 D6

D1 D0

Data(n)

NO ACK

1 0 1 0

R

Device Address

Device Address

R/W

ACK

Dummy Write

Current Read

A7 A6 A5 A4 A3 A2 A1 A0

ACK

ACK

A

11

A

12

**

S2 S1 S0

* : Don’t care bit