bq24190, bq24192

bq24192I, bq24193

SLUSAW5A – JANUARY 2012 – REVISED OCTOBER 2012

www.ti.com

PIN FUNCTIONS (continued)

PIN

TYPE

DESCRIPTION

NAME

NO.

TS1

11

I

Temperature qualification voltage input #1. Connect a negative temperature coefficient thermistor. Program temperature

window with a resistor divider from REGN to TS1 to GND. Charge suspends when either TS pin is out of range.

Analog

Recommend 103AT-2 thermistor. TS1 and TS2 pins have to be shorted together in bq24193.

TS2

12

I

Temperature qualification voltage input #2. Connect a negative temperature coefficient thermistor. Program temperature

window with a resistor divider from REGN to TS2 to GND. Charge suspends when either TS pin is out of range.

Analog

Recommend 103AT-2 thermistor. TS1 and TS2 pins have to be connected together in bq24193.

BAT

13,14

P

Battery connection point to the positive terminal of the battery pack. The internal BATFET is connected between BAT and

SYS. Connect a 10uF closely to the BAT pin.

SYS

15,16

P

System connection point. The internal BATFET is connected between BAT and SYS. When the battery falls below the

minimum system voltage, switch-mode converter keeps SYS above the minimum system voltage. (Refer to Application

Information Section for inductor and capacitor selection)

PGND

17,18

P

Power ground connection for high-current power converter node. Internally, PGND is connected to the source of the n-

channel LSFET. On PCB layout, connect directly to ground connection of input and output capacitors of the charger. A

single point connection is recommended between power PGND and the analog GND near the IC PGND pin.

SW

19,20

O

Switching node connecting to output inductor. Internally SW is connected to the source of the n-channel HSFET and the

drain of the n-channel LSFET. Connect the 0.047µF bootstrap capacitor from SW to BTST.

Analog

BTST

21

P

PWM high side driver positive supply. Internally, the BTST is connected to the anode of the boost-strap diode. Connect

the 0.047µF bootstrap capacitor from SW to BTST.

REGN

22

P

PWM low side driver positive supply output. Internally, REGN is connected to the cathode of the boost-strap diode. For

VBUS above 6V, connect 1-µF ceramic capacitor from REGN to analog GND. For VBUS below 6V, connect a 4.7-

μF

(10V rating) ceramic capacitor from REGN to analog GND. The capacitor should be placed close to the IC. REGN also

serves as bias rail of TS1 and TS2 pins.

PMID

23

O

Connected to the drain of the reverse blocking MOSFET and the drain of HSFET. Given the total input capacitance,

connect a 1-µF capacitor on VBUS to PGND, and the rest all on PMID to PGND. (Refer to Application Information Section

Analog

for details)

PowerPAD

–

P

Exposed pad beneath the IC for heat dissipation. Always solder PowerPAD™ to the board, and have vias on the Power

Pad plane star-connecting to PGND and ground plane for high-current power converter.

ABSOLUTE MAXIMUM RATINGS

VALUE

VBUS

–2 V – 20 V

PMID, STAT, PG

–0.3 V –20 V

BTST

–0.3 V – 26 V

SW

–2 V – 20 V

Voltage range (with respect to GND)

BAT, SYS (converter not switching)

–0.3 V – 6 V

SDA, SCL, INT, OTG, ILIM, REGN, TS1, TS2, CE, PSEL, D+, D–

–0.3 V – 7 V

BTST TO SW

–0.3 V – 7 V

PGND to GND

–0.3 V – 0.3 V

Output sink current

INT, STAT, PG

6mA

Junction temperature

–40°C to 150°C

Storage temperature

–65°C to 150°C

RECOMMENDED OPERATING CONDITIONS

MIN

MAX

UNIT

Input voltage

3.9

V

Input current

3

A

Output current (SYS)

4.5

A

Battery voltage

4.4

V

(1)

The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BTST or SW pins. A tight

layout minimizes switching noise.

8

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