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ACT8937AQJ106-T Datasheet(PDF) 11 Page - Active-Semi, Inc

Part # ACT8937AQJ106-T
Description  Advanced PMU for Samsung S5PC100, S5PC110 and S5PV210 Processors
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Manufacturer  ACTIVE-SEMI [Active-Semi, Inc]
Direct Link  http://www.active-semi.com
Logo ACTIVE-SEMI - Active-Semi, Inc

ACT8937AQJ106-T Datasheet(HTML) 11 Page - Active-Semi, Inc

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ACT8937A
Rev 1, 22-Oct-12
Copyright © 2012 Active-Semi, Inc.
Innovative Power
TM
ActivePMU
TM and ActivePathTM are trademarks of Active-Semi.
I
2CTM is a trademark of NXP.
- 11 -
www.active-semi.com
REGISTER AND BIT DESCRIPTIONS CONT’D
OUTPUT
ADDRESS
BIT
NAME
ACCESS
DESCRIPTION
REG2
0x31
[5:0]
VSET2
R/W
Secondary Output Voltage Selection. Valid when VSEL is
driven high. See the Output Voltage Programming section for
more information.
REG2
0x32
[7]
ON
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG2
0x32
[6]
PHASE
R/W
Regulator Phase Control. Set bit to 1 for the regulator to
operate 180° out of phase with the oscillator, clear bit to 0 for
the regulator to operate in phase with the oscillator.
REG2
0x32
[5]
MODE
R/W
Regulator Mode Select. Set bit to 1 for fixed-frequency PWM
under all load conditions, clear bit to 0 to transit to power-
savings mode under light-load conditions.
REG2
0x32
[4:2]
DELAY
R/W
Regulator Turn-On Delay Control. See the REG1, REG2,
REG3 Turn-on Delay
section for more information.
REG2
0x32
[1]
nFLTMSK
R/W
Regulator Fault Mask Control. Set bit to 1 enable fault-
interrupts, clear bit to 0 to disable fault-interrupts.
REG2
0x32
[0]
OK
R
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG3
0x40
[5:0]
VSET1
R/W
Primary Output Voltage Selection. Valid when VSEL is driven
low. See the Output Voltage Programming section for more
information.
REG3
0x41
[7:6]
-
R
Reserved.
REG3
0x41
[5:0]
VSET2
R/W
Secondary Output Voltage Selection. Valid when VSEL is
driven high. See the Output Voltage Programming section for
more information.
REG3
0x42
[7]
ON
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG3
0x42
[6]
-
R/W
Reserved.
REG3
0x42
[5]
MODE
R/W
Regulator Mode Select. Set bit to 1 for fixed-frequency PWM
under all load conditions, clear bit to 0 to transit to power-
savings mode under light-load conditions.
REG3
0x42
[4:2]
DELAY
R/W
Regulator Turn-On Delay Control. See the REG1, REG2,
REG3 Turn-on Delay
section for more information.
REG3
0x42
[1]
nFLTMSK
R/W
Regulator Fault Mask Control. Set bit to 1 enable fault-
interrupts, clear bit to 0 to disable fault-interrupts.
REG3
0x42
[0]
OK
R
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG4
0x50
[7:6]
-
R
Reserved.
REG4
0x50
[5:0]
VSET
R/W
Output Voltage Selection. See the Output Voltage
Programming
section for more information.
REG4
0x51
[7]
ON
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG4
0x51
[6]
DIS
R/W
Output Discharge Control. When activated, LDO output is
discharged to GA through 1.5kΩ resistor when in shutdown.
Set bit to 1 to enable output voltage discharge in shutdown,
clear bit to 0 to disable this function.
REG4
0x51
[5]
LOWIQ
R/W
LDO Low-IQ Mode Control. Set bit to 1 for low-power
operating mode, clear bit to 0 for normal mode.
REG4
0x51
[4:2]
DELAY
R/W
Regulator Turn-On Delay Control. See the REG4, REG5,
REG6, REG7 Turn-on Delay
section for more information.
REG3
0x40
[7:6]
-
R
Reserved.
REG4
0x51
[1]
nFLTMSK
R/W
Regulator Fault Mask Control. Set bit to 1 enable fault-
interrupts, clear bit to 0 to disable fault-interrupts.


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