Dual Channel Switch Interface IC

A6850

6

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Signal and Enable delays

When ENABLEx = 1, current signals applied to the OUTPUTx

pins will appear scaled and delayed on the SENSEx pins. The

transfer characteristic can be considered that of a low pass filter.

The response time definitions are given in figures 1 and 2, in the

Characteristic Performance section.

The rise time response is dependent on the effective capacitance

loading on the SENSEx pin.

The RC time constant,

, can be estimated using:

(2)

be in ns.



(3)

The small signal low pass filter bandwidth based on a single pole

response may be estimated using:



BW

(4)

ter estimate may be given by:



BW

(5)

Each signal channel may be enabled or disabled individually via

their respective ENABLEx pins, as shown in table 1.

When a capacitor is added in parallel with the signal source con-

nected to an OUTPUTx pin, additional allowance must be made

for settling time caused by the inrush current needed to recharge a

partially, or fully discharged, capacitor which has decayed during

the disabled period.

current limit value for the OUTPUTx pins.

The effects will be most noticeable on a SENSEx pin and will

Thermal Shutdown (TSD)

The A6850 protects itself from excessive heat damage by

Table 1. Enable/Disable Signal Channel Truth Table

EN1

EN2

IOU1

IOU2

SEN1

SEN2

L*

L*

0000

HL

0

LH

0

HH

*Sleep mode

0 mA

0 V

50%

OUTPUTx

SENSEx

ENABLEx

Figure 4. Overshoot resulting from additional capacitance.