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A6850 Datasheet(PDF) 2 Page - Allegro MicroSystems

Part # A6850
Description  Dual Channel Switch Interface IC
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A6850 Datasheet(HTML) 2 Page - Allegro MicroSystems

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Dual Channel Switch Interface IC
A6850
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Terminal List Table
Name
Number
Description
ENABLE1
1
Digital input pulled to ground
SENSE1
2
Sensed current output
ENABLE2
3
Digital input pulled to ground
SENSE2
4
Sensed current output
VIN
5
Chip power supply voltage
OUTPUT2
6
Switchable voltage supply to sensor IC
GROUND
7
Ground reference
OUTPUT1
8
Switchable voltage supply to sensor IC
2
3
4
1
7
6
5
8
ENABLE1
SENSE1
ENABLE2
SENSE2
OUTPUT1
GROUND
OUTPUT2
VIN
Switch
Switch
Control
The A6850 eliminates the need for the external series shunt resistor
in Hall device applications by incorporating an integrated current
mirror which reports the Hall IC supply current as a 1/10 value on
the SENSE1 or SENSE2 output pin. A low current Sleep mode is
available (<15 μA) by driving both ENABLE pins low. Also, the
A6850 can be used to interface to mechanical switches.
The A6850 is supplied in an 8-pin Pb (lead) free SOIC package,
with 100% matte tin leadframe plating.
Description (continued)
Pin-out Diagram
Selection Guide
Part Number
Packing
A6850KLTR-T
13-in. reel, 3000 pieces/reel
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
Supply Voltage
VIN
40
V
Output Voltage
VOUTPUTx
–0.3 to 40
V
SENSEx Voltage Range
VSENSEx
–0.3 to 7
V
ENABLEx Voltage Range
VENABLEx
–0.3 to 7
V
Operating Ambient Temperature
TA
–40 to 150
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Storage Temperature
Tstg
–55 to 150
ºC
ESD Rating - Human Body Model
HBM
AEC-Q100-002; OUTPUT1 and OUTPUT2
4.5
kV
AEC-Q100-002; all other pins
2.5
kV
ESD Rating - Charged Device Model
CDM
AEC-Q100-011; all pins
1050
V
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
Value
Units
Package Thermal Resistance
RθJA
4-layer PCB based on JEDEC standard
80
ºC/W
1-layer PCB with copper limited to solder pads
140
ºC/W
*Additional thermal data available on the Allegro Web site.


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