03/2012

AWC6323

3.4 V Linear Power Amplifier Module

Data Sheet - Rev 2.2

M47 Package

14 Pin 3 mm x 5 mm x 1 mm

Surface Mount Module

FEATURES

• InGaP HBT Technology

• High Efficiency (Cell Band):

• Low Quiescent Current: 3.5 mA

• Internal Voltage Regulation

• Built-in Directional Coupler

• Reduced External Component Count

• Low Profile Surface Mount Package: 1 mm

APPLICATIONS

• Cell & PCS Dual-band Wireless Handsets and

Data Devices for CDMA/EVDO networks.

PRODUCT DESCRIPTION

AWC6323 addresses the demand for increased

integration in dual-band handsets for CDMAnetworks.

The small footprint 3 mm x 5 mm x 1 mm surface-

mount RoHS compliant package contains independent

RF PA paths to ensure optimal performance in both

frequency bands, while achieving a 25% PCB space

savings compared with solutions requiring two

single-band PAs. The package pinout was chosen

to enable handset manufacturers to easily route bias

to both power amplifiers and simplify control with

common mode pins. The device is manufactured on

an advanced InGaP HBT MMIC technology offering

state-of-the-art reliability, temperature stability, and

ruggedness. The AWC6323 is part of ANADIGICS’

High-Efficiency-at-Low-Power (HELP™) family of

CDMA power amplifiers, which deliver low quiescent

currents and significantly greater efficiency without

the need of an external DC-DC converter. Through

selectable bias modes, the AWC6323 achieves

optimal efficiency, specifically at low- and mid-range

power levels where the PA typically operates, thereby

dramatically increasing handset talk-time. Its built-in

voltage regulator eliminates the need for external

switches. This PA has built-in directional couplers

for each band, with a common coupler output port

CPL_OUT. The 3 mm x 5 mm x 1 mm surface mount

package incorporates matching networks optimized

for output power, efficiency and linearity in a 50 Ω

system.

Figure 1: Block Diagram

AWC6323

1

13

11

14

12

3

4

2

GND

5

6

10

9

Bias Control

Voltage Regulation

GND at Slug (pad)

8

7

GND

Bias Control

Voltage Regulation

CPL

CPL