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AD6640PCB Datasheet(PDF) 3 Page - Analog Devices

Part # AD6640PCB
Description  12-Bit, 65 MSPS IF Sampling A/D Converter
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6640PCB Datasheet(HTML) 3 Page - Analog Devices

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SWITCHING SPECIFICATIONS
1
Test
AD6640AST
Parameter (Conditions)
Temp
Level
Min
Typ
Max
Units
Maximum Conversion Rate
Full
VI
65
MSPS
Minimum Conversion Rate
2
Full
IV
6.5
MSPS
Aperture Delay (tA)
+25
°C
V
400
ps
Aperture Uncertainty (Jitter)
+25
°C
V
0.3
ps rms
ENCODE Pulsewidth High
3
+25
°C
IV
6.5
ns
ENCODE Pulsewidth Low
+25
°C
IV
6.5
ns
Output Delay (tOD) DVCC +3.3 V/5.0 V
4
Full
IV
8.5
10.5
12.5
ns
NOTES
1All switching specifications tested by driving ENCODE and ENCODE differentially.
2A plot of Performance vs. Encode is shown in Figure 16 under Typical Performance Characteristics.
3A plot of Performance vs. Duty Cycle (Encode = 65 MSPS) is shown in Figure 17 under Typical Performance Characteristics.
4Outputs driving one LCX gate. Delay is measured from differential crossing of ENC,
ENC to the time when all output data bits are within valid logic levels.
Specifications subject to change without notice.
AC SPECIFICATIONS1
Test
AD6640AST
Parameter (Conditions)
Temp
Level
Min
Typ
Max
Units
SNR
Analog Input
2.2 MHz
+25
°CV
68
dB
@ –1 dBFS
15.5 MHz
+25
°C
I
64
67.7
dB
31.0 MHz
+25
°C
V
67.5
dB
69.0 MHz
+25
°CV
66
dB
SINAD
Analog Input
2.2 MHz
+25
°CV
68
dB
@ –1 dBFS
15.5 MHz
+25
°C
I
63.5
67.2
dB
31.0 MHz
+25
°C
V
67.0
dB
69.0 MHz
+25
°C
V
65.5
dB
Worst Harmonic2 (2nd or 3rd)
Analog Input
2.2 MHz
+25
°C
V
80
dBc
@ –1 dBFS
15.5 MHz
+25
°C
I
74
80
dBc
31.0 MHz
+25
°C
V
79.5
dBc
69.0 MHz
+25
°C
V
78.5
dBc
Worst Harmonic2 (4th or Higher)
Analog Input
2.2 MHz
+25
°C
V
85
dBc
@ –1 dBFS
15.5 MHz
+25
°C
I
74
85
dBc
31.0 MHz
+25
°C
V
85
dBc
69.0 MHz
+25
°C
V
84
dBc
Multitone SFDR (w/Dither)
3
Eight Tones @ –20 dBFS
Full
V
90
dBFS
Two-Tone IMD Rejection
4
F1, F2 @ –7 dBFS
Full
V
80
dBc
Analog Input Bandwidth
5
+25
°C
V
300
MHz
NOTES
1All ac specifications tested by driving ENCODE and
ENCODE differentially.
2For a single test tone at –1 dBFS, the worst case spectral performance is typically limited by the direct or aliased 2nd or 3rd harmonic. If a system is designed such
that the 2nd and 3rd harmonics fall out-of-band, overall performance in the band of interest is typically improved by 5 dB. Worst Harmonic (4th or Higher) includes
4th and higher order harmonics and all other spurious components. Reference Figure 12 for more detail.
3See Overcoming Static Nonlinearities with Dither section for details on improving SFDR performance. To measure SFDR, eight tones from 14 MHz to 18 MHz
(0.5 MHz spacing) are swept from –20 dBFS to –90 dBFS. An open channel at 16 MHz is used to monitor SFDR.
4F1 = 14.9 MHz, F2 = 16 MHz.
5Specification is small signal bandwidth. Plots of Performance versus Analog Input Frequency are shown in Figures 10, 11 and 12. Sampling wide bandwidths
(5 MHz–15 MHz) should be limited to 70 MHz center frequency.
Specifications subject to change without notice.
REV. 0
–3–
AD6640
(AVCC = +5 V, DVCC = +3.3 V; ENCODE & ENCODE = 65 MSPS; TMIN = –40 C, TMAX = +85 C)
(AVCC = +5 V, DVCC = +3.3 V; ENCODE & ENCODE = 65 MSPS; TMIN = –40 C, TMAX = +85 C)


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