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MOD5272 Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers |
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MOD5272 Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers |
5 / 7 page Updated: July 17, 2012 | Page 5 of 7 © 2012 NetBurner Inc. All Rights Reserved. MOD5272 J1 Connector (continued) Pin CPU Pin Function General Purpose I/O Description Max Voltage 26 H14 D14 Data Bus - Data 14 3.3VDC 27 G14 D13 Data Bus - Data 13 3.3VDC 28 M12 RESET Processor Reset Input1 3.3VDC 29 H13 D15 Data Bus - Data 15 3.3VDC 30 F4 RSTOUT Processor Reset Output1 3.3VDC 31 CLK_OUT Clock Out (CLKOUT-62.5 MHz) 3.3VDC 32 D10 A0 Data Bus - Address 0 3.3VDC 33 B12 A1 Data Bus - Address 1 3.3VDC 34 A12 A2 Data Bus - Address 2 3.3VDC 35 A13 A3 Data Bus - Address 3 3.3VDC 36 A14 A4 Data Bus - Address 4 3.3VDC 37 B13 A5 Data Bus - Address 5 3.3VDC 38 B14 A6 Data Bus - Address 6 3.3VDC 39 C12 A7 Data Bus - Address 7 3.3VDC 40 C13 A8 Data Bus - Address 8 3.3VDC 41 C14 A9 Data Bus - Address 9 3.3VDC 42 D12 A10 Data Bus - Address 10 3.3VDC 43 C11 A11 Data Bus - Address 11 3.3VDC 44 B11 A12 Data Bus - Address 12 3.3VDC 45 A11 A13 Data Bus - Address 13 3.3VDC 46 C10 A14 Data Bus - Address 14 3.3VDC 47 D9 A15 Data Bus - Address 15 3.3VDC 48 VCC3V Input Power 3.3 VDC 3.3VDC 49 GND Ground - 50 GND Ground - Note: 1. Active low signals, such as RESET, are indicated with an overbar. 2. The TIP signal is the logical AND of CS1, CS2 and CS3. TIP can be used to control an external data bus buffer for the data bus signals. An example circuit design can be found on the Module Development Board schematic. An external data bus buffer is recommended for any designs that use data bus signals D16 - D31. 3. J2-31 represents TIN0 and PB4/UART0 external baud rate clock. These two signals are tied together on the module PCB. 4. The ColdFire 5272 processor supports USB device mode only. A 48Mhz oscillator must be installed in locaton U8 of the Mod5272. |
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