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AD7225TE Datasheet(PDF) 2 Page - Analog Devices |
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AD7225TE Datasheet(HTML) 2 Page - Analog Devices |
2 / 12 page REV. B –2– AD7225–SPECIFICATIONS DUAL SUPPLY K, B L, C Parameter Versions 2 Versions 2 T Version U Version Units Conditions/Comments STATIC PERFORMANCE Resolution 8 8 8 8 Bits Total Unadjusted Error ± 2 ± 1 ± 2 ± 1 LSB max VDD = +15 V ± 5%, VREF = +10 V Relative Accuracy ± 1 ± 1/2 ± 1 ± 1/2 LSB max Differential Nonlinearity ± 1 ± 1 ± 1 ± 1 LSB max Guaranteed Monotonic Full-Scale Error ± 1 ± 1/2 ± 1 ± 1/2 LSB max Full-Scale Temp. Coeff. ± 5 ± 5 ± 5 ± 5 ppm/ °C typ VDD = 14 V to 16.5 V, VREF = +10 V Zero Code Error @ 25 °C ± 25 ± 15 ± 25 ± 15 mV max TMIN to TMAX ± 30 ± 20 ± 30 ± 20 mV max Zero Code Error Temp Coeff. ± 30 ± 30 ± 30 ± 30 µV/°C typ REFERENCE INPUT Voltage Range 2 to (VDD – 4) 2 to (VDD – 4) 2 to (VDD – 4) 2 to (VDD – 4) V min to V max Input Resistance 11 11 11 11 k Ω min Input Capacitance 3 100 100 100 100 pF max Occurs when each DAC is loaded with all 1s. Channel-to-Channel Isolation 3 60 60 60 60 dB min VREF = 10 V p-p Sine Wave @ 10 kHz AC Feedthrough 3 –70 –70 –70 –70 dB max VREF = 10 V p-p Sine Wave @ 10 kHz DIGITAL INPUTS Input High Voltage, VINH 2.4 2.4 2.4 2.4 V min Input Low Voltage, VINL 0.8 0.8 0.8 0.8 V max Input Leakage Current ± 1 ± 1 ± 1 ± 1 µA max VIN = 0 V or VDD Input Capacitance 3 8 8 8 8 pF max Input Coding Binary Binary Binary Binary DYNAMIC PERFORMANCE Voltage Output Slew Rate 3 2.5 2.5 2.5 2.5 V/ µs min Voltage Output Settling Time 3 Positive Full-Scale Change 5 5 5 5 µs max VREF = +10 V; Settling Time to ± 1/2 LSB Negative Full-Scale Change 5 5 5 5 µs max VREF = +10 V; Settling Time to ± 1/2 LSB Digital Feedthrough 3 50 50 50 50 nV secs typ Code transition all 0s to all 1s. Digital Crosstalk 3 50 50 50 50 nV secs typ Code transition all 0s to all 1s. Minimum Load Resistance 2 2 2 2 k Ω min VOUT = +10 V POWER SUPPLIES VDD Range 11.4/16.5 11.4/16.5 11.4/16.5 11.4/16.5 V min to V max For Specified Performance IDD 10 10 12 12 mA max Outputs Unloaded; VIN = VINL or VINH ISS 9 9 10 10 mA max Outputs Unloaded; VIN = VINL or VINH SWITCHING CHARACTERISTICS 3, 4 t1 @ 25 °C 95 95 95 95 ns min Write Pulse Width TMIN to TMAX 120 120 150 150 ns min t2 @ 25 °C 0 0 0 0 ns min Address to Write Setup Time TMIN to TMAX 0 0 0 0 ns min t3 @ 25 °C 0 0 0 0 ns min Address to Write Hold Time TMIN to TMAX 0 0 0 0 ns min t4 @ 25 °C 70 70 70 70 ns min Data Valid to Write Setup Time TMIN to TMAX 90 90 90 90 ns min t5 @ 25 °C 10 10 10 10 ns min Data Valid to Write Hold Time TMIN to TMAX 10 10 10 10 ns min t6 @ 25 °C 95 95 95 95 ns min Load DAC Pulse Width TMIN to TMAX 120 120 150 150 ns min NOTES 1Maximum possible reference voltage. 2Temperature ranges are as follows: K, L Versions: –40 °C to +85°C B, C Versions: –40 °C to +85°C T, U Versions: –55 °C to +125°C 3Sample Tested at 25 °C to ensure compliance. 4Switching characteristics apply for single and dual supply operation. Specifications subject to change without notice. (VDD = 11.4 V to 16.5 V, VSS = –5 V 10%; AGND = DGND = O V; VREF = +2 V to (VDD – 4 V) 1 unless otherwise noted. All specifications TMIN to TMAX unless otherwise noted.) |
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