Maxim Integrated │ 5

MAX11166/MAX11167

16-Bit, 500ksps/250ksps, ±5V SAR ADCs

with Internal Reference in TDFN

www.maximintegrated.com

Electrical Characteristics (continued)

Note 2: Maximum and minimum limits are fully production tested over specified supply voltage range and at a temperature of +25°C

and +85°C. Limits below +25°C are guaranteed by design and device characterization. Typical values are not guaranteed.

Note 3: See the Analog Inputs and Overvoltage Input Clamps sections.

Note 4: See the Definitions section.

Note 6: 10kHz sine wave input, -0.1dB below full scale.

Note 7: See Table 4 for definition of the reference modes.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

TIMING (Note 9)

Time Between Conversions

MAX11166

2

100000

µs

MAX11167

4

100000

µs

Conversion Time

CNVST rising to

data available

MAX11166

1.35

1.5

µs

MAX11167

2.7

3.0

Acquisition Time

MAX11166

0.5

µs

MAX11167

1

CNVST Pulse Width

CS mode

5

ns

SCLK Period (CS Mode)

14

ns

20

26

SCLK Period (Daisy-Chain Mode)

16

ns

24

30

SCLK Low Time

5

ns

SCLK High Time

5

ns

SCLK Falling Edge to Data Valid

Delay

12

ns

18

23

CNVST Low to DOUT D15 MSB

Valid (CS Mode)

14

ns

17

CNVST High or Last SCLK

Falling Edge to DOUT High

Impedance

CS Mode

20

ns

DIN Valid Setup Time from SCLK

Falling Edge

3

ns

5

6

DIN Valid Hold Time from SCLK

Falling Edge

0

ns

SCLK Valid Setup Time to

CNVST Falling Edge

3

ns

SCLK Valid Hold Time to CNVST

Falling Edge

6

ns