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AD7887BR Datasheet(PDF) 7 Page - Analog Devices

Part # AD7887BR
Description  2.7 V to 5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7887BR Datasheet(HTML) 7 Page - Analog Devices

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REV. B
AD7887
–7–
CONTROL REGISTER
The Control Register on the AD7887 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7887 on the rising
edge of SCLK. The data is transferred on the DIN line at the same time as the conversion result is read from the part. This requires
16 serial clocks for every data transfer. Only the information provided on the first eight rising clock edges (after CS falling edge) is
loaded to the Control Register. MSB denotes the first bit in the data stream. The bit functions are outlined in Table I. The contents
of the Control Register on power up is all zeros.
Table I. Control Register
MSB
DONTC
ZERO
REF
SIN/DUAL
CH
ZERO
PM1
PM0
Bit
Mnemonic
Comment
7
DONTC
Don’t Care. The value written to this bit of the Control Register is a don’t care, i.e., it doesn’t matter if
the bit is 0 or 1.
6
ZERO
A zero must be written to this bit to ensure correct operation of the AD7887.
5
REF
Reference Bit. With a 0 in this bit, the on-chip reference is enabled. With a 1 in this bit, the on-chip
reference is disabled.
4
SIN/DUAL
Single/Dual Bit. This bit determines whether the AD7887 operates in single-channel or dual-channel
mode. A 0 in this bit selects single-channel operation and the AIN1/VREF pin assumes its VREF function.
A 1 in this bit selects dual-channel mode and the reference voltage for the ADC is internally connected
to VDD and the AIN1/VREF pin assumes its AIN1 function as the second analog input channel. To
obtain best performance from the AD7887, the internal reference should be disabled when operating in
the dual channel mode, i.e., REF = 1.
3
CH
Channel Bit. When the part is selected for dual-channel mode, this bit determines which channel will be
converted for the next conversion. A 0 in this bit selects the AIN0 input while a 1 in this bit selects the
AIN1 input. In single-channel mode, this bit should always be 0.
2
ZERO
A zero must be written to this bit to ensure correct operation of the AD7887.
1, 0
PM1, PM0
Power Management Bits. These two bits decode the mode of operation of the AD7887 as described
below.
Table II. Power Management Options
PM1
PM0
Mode
00
Mode 1
. In this mode, the AD7887 enters shutdown if the CS input is 1 and is in full power mode when
CS is 0. Thus the part comes out of shutdown on the falling edge of CS and enters shutdown on the
rising edge of CS.
01
Mode 2
. In this mode, the AD7887 is always fully powered up, regardless of the status of any of the logic
inputs.
10
Mode 3
. In this mode, the AD7887 automatically enters shutdown mode at the end of each conversion,
regardless of the state of CS.
11
Mode 4
. In this standby mode, portions of the AD7887 are powered down but the on-chip reference
voltage remains powered up. This mode is similar to Mode 3, but allows the part to power up much
faster. The REF bit should be 0 to ensure the on-chip reference is enabled.


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