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MMA2301KEG Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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MMA2301KEG Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
5 / 11 page Sensors Freescale Semiconductor, Inc. 5 MMA2301KEG BASIC CONNECTIONS PINOUT DESCRIPTION Figure 4. SOIC Accelerometer with Recommended Connection Diagram Figure 5. Recommend PCB Layout for Interfacing Accelerometer to Microcontroller NOTES: • Use a 0.1 F capacitor on V DD to decouple the power source. • Physical coupling distance of the accelerometer to the microcontroller should be minimal. • Place a ground plane beneath the accelerometer to reduce noise, the ground plane should be attached to all of the open ended terminals shown in Figure 5 • Use an RC filter of 1 k and 0.01 F on the output of the accelerometer to minimize clock noise (from the switched capacitor filter circuit). • PCB layout of power and ground should not couple power supply noise. • Accelerometer and microcontroller should not be a high current path. A/D sampling rate and any external power supply switching frequency should be selected such that they do not interfere with the internal accelerometer sampling frequency. This will prevent aliasing errors. Table 3. Pin Descriptions Pin No. Pin Name Description 1 thru 3 N/C Leave unconnected. 4 ST Logic input pin used to initiate self- test. 5VOUT Output voltage of the accelerometer. 6 STATUS Logic output pin to indicate fault. 7VSS The power supply ground. 8VDD The power supply input. 9 thru 13 Trim pins Used for factory trim. Leave unconnected. 14 thru 16 — No internal connection. Leave unconnected. 10 11 12 13 14 15 16 9 N/C N/C N/C N/C N/C N/C N/C N/C 8 7 6 5 4 3 2 1 N/C N/C N/C ST VOUT STATUS VDD VSS MMA2301KEG ST VDD VSS VOUT Output Signal R1 1 k 5 C2 0.01 F 4 8 7 Logic Input VDD C1 0.1 F 6 Status P0 A/D In VRH VSS VDD ST VOUT VSS VDD 0.01 F 1 k 0.1 F Power Supply C 0.1 F P1 STATUS C C C 0.1 F PCB Layout R |
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