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AD8361ART-REEL Datasheet(PDF) 2 Page - Analog Devices |
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AD8361ART-REEL Datasheet(HTML) 2 Page - Analog Devices |
2 / 16 page –2– REV. A AD8361–SPECIFICATIONS (TA = 25 C, VS = 3 V, fRF = 900 MHz, ground reference output mode, unless otherwise noted.) Parameter Condition Min Typ Max Unit SIGNAL INPUT INTERFACE (Input RFIN) Frequency Range 1 2.5 GHz Linear Response Upper Limit VS = 3 V 390 mV rms Equivalent dBm re 50 Ω 4.9 dBm VS = 5 V 660 mV rms Equivalent dBm re 50 Ω 9.4 dBm Input Impedance 2 225 1 Ω pF RMS CONVERSION (Input RFIN to Output V rms) Conversion Gain 7.5 V/V rms fRF = 100 MHz, VS = 5 V 6.5 8.5 V/V rms Dynamic Range Error Referred to Best Fit Line 3 ±0.25 dB Error4 CW Input, –40 °C < T A < +85 °C14 dB ±1 dB Error CW Input, –40 °C < T A < +85 °C23 dB ±2 dB Error CW Input, –40 °C < T A < +85 °C26 dB CW Input, VS = 5 V, –40 °C < T A < +85 °C30 dB Intercept-Induced Dynamic Internal Reference Mode 1 dB Range Reduction 5, 6 Supply Reference Mode, VS = 3.0 V 1 dB Supply Reference Mode, VS = 5.0 V 1.5 dB Deviation from CW Response 5.5 dB Peak-to-Average Ratio (IS95 Reverse Link) 0.2 dB 12 dB Peak-to-Average Ratio (W-CDMA 4 Channels) 1.0 dB 18 dB Peak-to-Average Ratio (W-CDMA 15 Channels) 1.2 dB OUTPUT INTERCEPT 5 Inferred from Best Fit Line 3 Ground Reference Mode (GRM) 0 V at SREF, VS at IREF 0 V fRF = 100 MHz, VS = 5 V –50 +150 mV Internal Reference Mode (IRM) 0 V at SREF, IREF Open 350 mV fRF = 100 MHz, VS = 5 V 300 500 mV Supply Reference Mode (SRM) 0 V at IREF, 3 V at SREF 400 mV fRF = 100 MHz, VS = 5 V 590 750 mV 0 V at IREF, VS at SREF VS/7.5 V POWER-DOWN INTERFACE PWDN HI Threshold 2.7 ≤ VS ≤ 5.5 V, –40 °C < T A < +85 °CV S – 0.5 V PWDN LO Threshold 2.7 ≤ VS ≤ 5.5 V, –40 °C < T A < +85 °C0.1 V Power-Up Response Time 2 pF at FLTR Pin, 224 mV rms at RFIN 5 µs 100 nF at FLTR Pin, 224 mV rms at RFIN 320 µs PWDN Bias Current <1 µA POWER SUPPLIES Operating Range –40 °C < T A < +85 °C2.7 5.5 V Quiescent Current 0 mV rms at RFIN, PWDN Input LO 7 1.1 mA Power-Down Current GRM or IRM, 0 mV rms at RFIN, PWDN Input HI <1 µA SRM, 0 mV rms at RFIN, PWDN Input HI 10 × V S µA NOTES 1Operation at arbitrarily low frequencies is possible; see Applications section. 2Figure 13 and Figure 40 show impedance vs. frequency for the micro_SOIC and SOT respectively. 3Calculated using linear regression. 4Compensated for output reference temperature drift; see Applications section. 5SOT-23-6L operates in ground reference mode only. 6The available output swing, and hence the dynamic range, is altered by both supply voltage and reference mode; see Figures 35 and 36. 7Supply current is input level dependant; see Figure 12. Specifications subject to change without notice. |
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