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EM47FM3288SBB Datasheet(PDF) 5 Page - Eorex Corporation |
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EM47FM3288SBB Datasheet(HTML) 5 Page - Eorex Corporation |
5 / 41 page EM47FM3288SBB Jul. 2012 5/41 www.eorex.com Ball Description (Continued) D3,D10,P10,P3 D4,D9,P9,P4 DQS0~3, /DQS0~3 (Data Strobe) Output with read data, input with write data. Edge aligned with read data, centered with write data. The data strobes DQS are paired with differential signals /DQS, respectively, to provide differential pair signaling to the system during both reads and writes. DDR3 SDRAM supports differential data strobe only and does not support single-ended. G4,G3,J4 RAS , CAS , WE (Command Inputs) RAS , CAS & WE (along with CS ) define the command being entered. C4,C9,R9,R4 DM0 ~MD3 (Input Data Mask) DM is input mask signal for write data. Input data is masked when DM are sampled HIGH coincident with that input data during a write access. DM is sampled on both edges of DQS. B2,A4,C2,B4,E2,E4,F 2,F4,B11,A9,C11,B9, E11,E9,F11,F9,M11, M9,N11,N9,R11,T9,T 11,U9,M2,M4,N2,N4, R2,T4,T2,U4 DQ0~31 (Data Input/Output) Data inputs and outputs are on the same pin. A1,G1,L1,U1,A12, G12,L12,U12,/F1,M1, A2,J2,U2,A11,J11, U11,F12,M12 VDD/VSS (Power Supply/Ground) VDD and VSS are power supply for internal circuits. B1,C1,R1,T1,D2,P2, E3,F3,M3,N3,E10,F1 0,M10,N10,D11,P11, B12,C12,R12,T12/D1 ,E1,N1,P1,A3,B3,C3, R3,T3,U3, A10,B10,C10,R10,T1 0,U10,D12,E12,N12, P12 VDDQ/ VSSQ (DQ Power Supply/DQ Ground) VDDQ and VSSQ are power supply for the output buffers. J3,J10,G2,H12 ZQ0 ~ZQ3 (ZQ Calibration) Reference pin for ZQ calibration H1 RESET (Active Low Asynchronous Reset) Reset is active when RESET is LOW, and inactive when RESET is HIGH. RESET must be HIGH during normal operation. RESET is a CMOS rail to rail signal with DC high and low at 80% and 20% of VDD, i.e. 1.20V for DC high and 0.30V for DC low. J1 VREFDQ (Reference Voltage) Reference voltage for DQ J12 VREFCA (Reference Voltage) Reference voltage for CA Note: Input pins only BA0-BA2, A0-A13, RAS , CAS , WE , CS , CKE, ODT and RESET do not supply termination. |
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